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DSP-C Compiler Development

DSP-C Compiler Development. Objective of presentation. To demonstrate DSP C Compiler development at acme t Process followed for DSP C Compiler development. Sequence of presentation. Customer Requirement Study Time Estimation On Requirement Development Model Chosen

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DSP-C Compiler Development

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  1. DSP-C Compiler Development

  2. Objective of presentation • To demonstrate • DSP C Compiler development at acmet • Process followed for DSP C Compiler development

  3. Sequence of presentation • Customer Requirement Study • Time Estimation On Requirement • Development Model Chosen • DSP C Compiler Team Formation • Development Process • DSP-C Compiler Construction • DSP-C Compiler Maintenance • Conclusion

  4. Duration of presentation • Estimated Time : ~ 60 Minutes

  5. Customer Requirement Study

  6. Customer Requirement Definition • DSP C Cross Compiler for target DSP processor • Windows platform • Compile DSP C program • Generate assembly code for target DSP processor • Generate ‘C’ source level debugging information Windows DSP C Program Target DSP Assembly With Debug Information DSP C Compiler

  7. Studied Customer Requirement • Target DSP processor architecture to be supported • ISO DSP C Specification • ISO C Specification

  8. Option list file Input processing C source file Stream of C statements Preprocessing Preprocessed C statements Lexical Analysis Stream of tokens Syntax Analysis Parse tree Symbol-table handler Error Handler Semantic Analysis Parse tree Loop Optimization & intermediate code generation Intermediate code Global Optimization Modified intermediate code Loop Optimization Modified intermediate code Code generation & register allocation Assembly code ILP and Memory Organization Preprocessed file(s) Error listing file(s) Assembly file(s) Prototype file(s) Call tree file Proposed Solution For Customer Requirement • Development platform • Windows 2K,XP • Development language • C • Development tools • Microsoft VC, Numega, QAC • Documentation tools • Microsoft Office, DOXYGEN • Version control • CVS • Defect tracking • acmet Defect Tracking System • Time tracking • acmet Time Tracking System

  9. Understanding, Proposal Approval/ Feedback Customer Approval • Confirmed understanding on requirement • Got approval for proposal from customer acmet Customer

  10. Time Estimation On Requirement

  11. Customer Requirement Identify tasks/sub-tasks Peer review Yes Past data Available Past data not available Corrections No Guesstimation Estimate time required Peer review Yes Corrections No Send to Customer for Approval Time Estimation – Overview

  12. DSP C Compiler Front-end Back-end Time Estimation • Created Work Break-down Structure (WBS) • Estimated time for each activity in the WBS • Guesstimation • Past experience • Calculated overall time estimation ‘T’ = t1 + t2 + … + t12 T t2 t3 t4 t1 t6 t7 t10 t5 t8 t9 t11 t12

  13. Development Model Chosen

  14. Development Model Chosen • Incremental Development Model • Construction of a software in a series of mini life cycles (increments) • Output of each increment is a usable product to the customer • Functional specification • Design document • User’s manual • Executable • Source code • Quality assurance information • Evaluation reports • QAC report • True coverage report

  15. Architectural Design Requirement Analysis Requirement Definition Stage n: Detailed design, code, debug, test, and delivery Stage 2: Detailed design, code, debug, test, and delivery Stage 1: Detailed design, code, debug, test, and delivery Incremental Development model

  16. Incremental Development model - Advantages Measurement of Productivity Measurement of Productivity • Implementation • Problems discovered during development can be solved before the rest of the system is build • Improves quality of the final product • Schedule • Delay in schedule can be identified earlier • Feedback on estimation from previous increments can be used for further increments • Development team can see the product actually working • A great boost to morale and leads to enhanced productivity • Productivity can be measured in terms of the actual product • Maintenance environment starts early • Limited scope and test-case thoroughness can be achieved easily • Identifies side effects at every increment • Increases the long-term success of the product • Customer can have better idea about meeting their requirement • Customer can revise their requirement, if required Improved Testing and Maintenance Improved Testing and Maintenance Early Identification of Problems Early Identification of Problems Better Validation of Requirement Better Validation of Requirement

  17. DSP C Compiler Team Formation

  18. Studied DSP Fundamentals Studied DSP C Specification Studied Target DSP Processor Architecture Familiarized Target DSP Assembly Instructions acmet Process Training Standards and Practices to be adopted, ‘C’ fundamentals, Ideal coding practices, Compiler fundamentals, Debugging skills, Testing techniques Stage1 Stage2 Stage3 Stage4 Stage5 Stage6 REG MA EX MD IA IF ID WB DSP C Compiler Team Formation Explored the following: • What is DSP? • Key features of a DSP processor • How is the DSP architecture different from RISC/CISC architecture? Referred web articles and tutorials for study Studied and understood the features supported in DSP C Referred study material: • DSP-C specification ISO/IEC DTR 18037:2005(E) _Fract • Studied key features of Target DSP architecture • Addressing modes • Clipping/rounding • Pipeline architecture • Explored Target DSP instruction set • Explored Target DSP tools (Assembler, Linker, Debugger) _X • Hand-coded assembly programs for DSP application 'FFT' • Gained in-depth knowledge on DSP architecture advantages • Derived design rules and used it in development _Accum MOVX R0, [b]; MOVX R1, [c]; ADD R2, R0, R1 MOVX R3, [e]; MOVX R4, [f]; ADD R5, R3, R4 MOVX [a], R2; MOVX [d], R5; _Sat _Y _Circ

  19. Communication Process

  20. Communication between team members • Communication between team members is by means of e-mail • Meeting/ Discussion is made in-case solution/ conclusion could not be derived for a problem by means of e-mail communication • Points discussed are recorded • Record of Discussion (RoD) • Minutes of Meeting (MoM) • RoD and MoM are sent to team by means of e-mail • Peer Reviews are done offline by means of e-mail

  21. Comment on A Comment on A Comment on A Comment on A Artifact for review Artifact for review Artifact ‘A’ for review Artifact ‘A’ for review Updated Artifact ‘A’ Updated Artifact ‘A’ Updated Artifact ‘A’ Updated Artifact ‘A’ Peer Review by means of e-mail • Artifact for review is sent to team • With deadline for review • Reviewers review at their own pace • Within the deadline for review • Send review comments to team • Update artifact based on review comments • Send updated artifact for review

  22. Communication Process - Advantages • Enhanced information sharing • Record for future reference • Cross-check the understanding of team members • Peer reviews are done effectively since reviewer can review the artifacts at his own pace within the deadline time

  23. Development Process

  24. Requirement from customer Initial Study Clarification from customer (if required) Input/ output Specification • Peer Review • Discussion • Meetings • Lessons learnt from previous increment Prepare Testing check-sheet • Peer Review • Discussion • Meetings • Lessons learnt from previous increment Design and Algorithm writing Coding and Unit testing Generate Black box test-cases QA Test Final Product Development Process - Overview

  25. Customer Requirement Algorithm Input/output specification Target DSP Processor Specification Reference Compiler Behavior Design Strategy Write unit tests Derive Input/Output Specification Team discussions Derive Design Strategy Clarification from customer Write Algorithm Possible Strategies Coding Initial Study Team Discussions Peer Review Unit testing Quality Assurance Test Prepare input/output specification Strategy 1 • Advantages • Disadvantages Strategy 2 • Advantages • Disadvantages Strategy n • Advantages • Disadvantages No Yes Make corrections/ modifications Make corrections/ modifications Passed ? Comments Peer Review Team Discussions Yes Peer Review No Algorithm Writing and Verification Coding and Unit Testing Code Review Algorithm Yes Update input/output specification Best Strategy Corrections Yes Corrections No Send to customer for confirmation Send to customer for confirmation No Source Code Development Process – Detail View • QA-C Test • Maintain QA-C metrics for functions • Cyclomatic Complexity (CYC) • Deepest level of nesting (MIF) • Static path count (PTH) • Eliminate QA-C errors/warnings • True Coverage Test • Achieve 100% code coverage • Identify and eliminate dead/unreachable code • Integration Test • Black box testing • Standard compiler test-suites

  26. Development Progress Monitor • Daily progress in development is monitored by acmet • Daily plan report • Daily work done report • Customer is made aware with the progress of Compiler development on weekly basis • Weekly work done report • Weekly progress tracking report • Gantt charts • Incremental delivery

  27. DSP C Compiler Construction

  28. Front-end Front-end Back-end Back-end ISO C specific support ISO C specific support RISC processor specific support DSP processor specific support DSP C Compiler Construction • Used RISC compiler front-end • Modified RISC compiler front-end (legacy code) to support DSP specific features • Constructed DSP C compiler back-end with DSP specific features C Compiler DSP C Compiler for DSP Processor for RISC Processor ISO DSP C specific support

  29. Code Generation • MAC (Multiply and Accumulate) Instructions Support • LRA (Local Register Allocation) Support • Memory Organization • Instruction Level Parallelism • Pipeline Hazards Optimizations • Conditional Instructions Support • Bit Field Instructions Support • Delay Slot Optimization Support • PC Relative addressing Support • Peephole Optimizations • Interrupt Handling • Bit Reversal Addressing • _X, _Y address space qualifiers • _Sat specifier • FX_FRACT_OVERFLOW pragma • FX_FULL_PRECISION pragma • Zero Overhead Loop (ZOL) • Paged Program Memory Support • Debug Information Support • Customer requirements • _Circ qualifier • __REG qualifier • ABS/NORM operators • BIT_REVERSAL pragma Front-end Back-end ISO C specific support DSP processor specific support ISO DSP C specific support DSP-C Compiler Front-end & Back-end Support

  30. Duration: Staff months : 66 Calendar months : 6 Task: • Enhancement in Key DSP features • Support all the integral and the fraction data types • Debug information support • Conditional instruction support • Bit-field instruction support Duration: Staff months : 56 Calendar months : 8 Task: • Support of following key DSP features • Instruction Level Parallelism • Memory management • Post increment/ decrement addressing modes • Zero overhead loop • MAC • Support of basic data types - Signed integer, Signed _Fract Duration: Staff months : 25 Calendar months : 2.5 Task: • Enhancement in Instruction level parallelism • Pragma and interrupt support • Modulo addressing mode support • Perennial and PlumHall testing Duration: Staff months : 25 Calendar months : 5 Task: • Hand code DSP application programs • DSP application study, G.729 • Understand requirement for the DSP application • Understand target DSP architecture features Increment 6 Increment 5 Increment 4 Duration: Staff months : 50 Calendar months : 5 Task: • Enhancement in Instruction level parallelism • Paged program memory support • Enhancement in MAC, ZOL • Peephole optimization Duration: Staff months : 8 Calendar months : 4 Task: • Various DSP architecture study • Suggestion for target DSP architecture design from compiler point of view • Overall functional specification preparation Increment 3 Increment 2 Increment 1 DSP C Compiler in 6 increments

  31. Challenges Faced • Understand the complexity in DSP architecture • Front-end design • Used RISC compiler front-end • Work on legacy code • Back-end design • Location of modules • Interface between modules • Interface between front-end and back-end • Effective use of architectural advantages • For example, • Instruction Level Parallelism (ILP) • Delay Slot Optimization (DSO) • Hardware Looping

  32. DSP C Compiler Maintenance

  33. DSP C Compiler Maintenance • Fix defects • Identified through acmet testing • Reported by customer • Defects to be fixed are chosen as per the requirement of customer • Strictly follow acmet defect fix process to avoid degradation

  34. Preliminary Analysis Root Cause Analysis Defect Analysis Report Proposed Code Correction • Peer Review • Discussion • Meetings • Lessons learnt from previous defect fixes Prepare Testing check-sheet Write Unit Tests • Peer Review • Discussion • Meetings • Lessons learnt from previous defect fixes Code Correction Unit Testing Generate Black box test-cases QA Test Final Product Defect Fix Process - Overview

  35. Conclusion

  36. Conclusion • Current Status • DSP C Compiler is delivered to customer • Customer is satisfied with our service • Currently maintenance support is being provided for the DSP C Compiler • Future Plan • Study and explore more optimization techniques used for DSP applications • Enhance the current optimization techniques we support

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