1 / 1

Yuriko Ishitobi Tohru Ishihara Hiroto Yasuura

Code Placement for Reducing the Energy Consumption of Embedded Processors with Scratchpad and Cache Memories. Yuriko Ishitobi Tohru Ishihara Hiroto Yasuura. Kyushu University. {ishitobi, ishihara, yasuura}@c.csce.kyushu-u.ac.jp. Background.

gari
Télécharger la présentation

Yuriko Ishitobi Tohru Ishihara Hiroto Yasuura

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Code Placement for Reducing the Energy Consumption of Embedded Processors with Scratchpad and Cache Memories Yuriko Ishitobi Tohru Ishihara Hiroto Yasuura Kyushu University {ishitobi, ishihara, yasuura}@c.csce.kyushu-u.ac.jp Background Code placement optimization flow NRE explosion Increased functionality of battery powered systems On-chip memory energy consumption is dominant in embedded processors Memory area Application program Instruction Set Simulator Cacheable region Memory object list Access trace Processor + memory Based system Scratchpad region Request of energy reduction Code placement program System control depends on software Non-cacheable region Hardware parameter Code placement result Use linker and compiler Software energy reduction method considering on-chip memory Hardware Our code placement method Energy estimation model Basic techniques Reduction of cache conflict miss Use scratchpad for energy reduction Cache-bypassed access to the low localized data • Applying these three techniques separately does not necessarily minimize the energy consumption Memory area • Apply three basic techniques by code placement to three regions • To the best of our knowledge, this isthe first technique which treats above three techniques simultaneously in a compiler framework Code placement algorithm Memory area Memory area Memory area Object A Object C Area 100Byte counts 2000 Memory object Area 200Byte counts 2500 … Object B Object D Memory object Area 80Byte counts 2500 Area 200Byte counts 2000 Memory object Memory object Memory object • Select a memory object in the order with high access frequency • Exchange the place of memory object with the other memory object • Try to put the memory object to non-cacheable region • Try to put the memory object to scratchpad region Access frequency=(access counts)/(Area) • Whenever the code placement changes, the energy consumption is evaluated by energy estimation model • Remember the temporary best location of the • After try all location, the location of is decided to its best location If the memory object can be put scratchpad region Memory object Memory object Repeat as long as the total energy consumption reduces Experimental result Result of compress Result of jpeg Result of mpeg2 Energy consumption [mJ] Energy consumption [mJ] Energy consumption [mJ] Execution cycle [M cycle] Execution cycle [M cycle] Execution cycle [M cycle] 16KB cache memory 8KB cache memory 16KB cache memory 16KB cache memory 8KB cache memory 8KB cache memory ORG: original CHE: reduce conflict miss only SPM: use SPM only CBN: CHE+SPM OUR: our code placement Logic Off-chip Cache cycle Scratchpad

More Related