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Kuno-Group B4 Yuuki Matsumoto

A report for Graduation research Development of Trigger Board for MPPC (for MuSIC experiment). Kuno-Group B4 Yuuki Matsumoto. Contents. 1.Back Ground & Purpose 2.Equipment 3.Experiment 4 .To do (Plan). 1.Back ground &Purpose. Strong magnetic field.

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Kuno-Group B4 Yuuki Matsumoto

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  1. A report for Graduation researchDevelopment of Trigger Board for MPPC (for MuSIC experiment) Kuno-Group B4 Yuuki Matsumoto

  2. Contents 1.Back Ground & Purpose 2.Equipment 3.Experiment 4.To do (Plan)

  3. 1.Back ground &Purpose Strong magnetic field Use MPPC for measurement of Muon(8×108/sec) usingscintillationcounter. here Complex circuit is needed to readout MPPC signal. SPIROC-A board can perform all part . I develop SPIROC-A board for MPPC

  4. SPIROC-A board 2.Equipment HV add and change logic circuit from PC FPGA I use right board The board, @MPPC 32ch can drive at the same time. @It has ADC. @We can program FPGA to use TDC. signal from MPPC EASIROC @It has not have TDC yet. @Clock output < 334MHz @Clock jitter ±100〜±150ps @The board is a new test board , so we don’t know clearly how to use. send command from PC Analog out NIM out hold

  5. Read Hold ADC1 25—175ns 1.5pF Slow Shaper Low Gain Pre Amp High Gain Pre Amp Read Hold 25—175ns ADC2 Slow Shaper 15pF 15ns Read Fast Shaper Discri OR32 EASIROC V_th

  6. 3.Experiment • I measured ADC spectra from Function Generator. • I measured ADC spectra from MPPC.

  7. @measured ADC spectra from Function Generator pink : direct signal from Function Generator(80mV 25ns) blue : high gain after slow shaper cyan : low gain after slow shaper no hold hold

  8. ADC spectra ( Function Generator gave 80mV 25ns pulse ) High gain phed = 975 ch Low gain

  9. ADC peak ch and input charge [pC]=[mV]×[ns]÷[50Ω] shaper is down Linear Δch=73.96 ΔpC

  10. @measured ADC spectra from MPPC Dark current 1 photon?? 2 photon?? What?? Hold is OR32. In oscilloscope , there are many hold from other ch. It may make noises. Now , examining

  11. 4.Todo measure MPPC spectra using LED measure resolution and delay of discriminator measure TDC spectra (extra TDC) write TDC program to FPGA in VHDL measure TDC spectra (internal TDC) < Internal TDC (plan) > counter (FPGA) PC Discri STOP time resolution <1000/334 = 2.99ns muon life time is 2μs START clock Signal from outside

  12. END

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