1 / 13

An Analysis of Memory Access in Relation to Operations on Data Structures

This analysis investigates the relationship between memory access behavior and data structure operations, focusing on memory latency as a bottleneck in performance due to page faults. By optimizing paging algorithms in real-time based on specific data usage scenarios, we aim to enhance performance. The study encompasses three phases: assessing virtual memory behavior, validating consistency in physical memory, and evaluating optimization potential through benchmarks like sequential access, bubblesort, and heapsort. Our findings reveal distinct access patterns that can inform better paging algorithm strategies.

giza
Télécharger la présentation

An Analysis of Memory Access in Relation to Operations on Data Structures

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. An Analysis of Memory Access in Relation to Operations on Data Structures An Analysis of Memory Access in Relation to Operations on Data Structures Ryan Connaughton & Daniel RinzlerCSE 60641December 13, 2006

  2. Memory latency is a consistent bottleneck Paging algorithms aim to minimize page faults Generality vs Optimization Suggestion: Optimize paging algorithms at runtime for specific scenarios The Problem

  3. Determine if potentially exploitable relationships between data structure usage and memory access locality exist Three Phases: 1 - Determine virtual memory behavior for benchmarks 2 - Verify that same behavior exists in physical memory 3 - Evaluate potential for optimizations Our Experiment

  4. Goal: To determine memory access behavior for an array Valgrind – Linux program debugger & profiler Scripts to filter for array accesses Phase 1: Virtual Memory Logging

  5. Goal: To verify that the access behavior from Phase 1 is consistent in physical memory Bochs Virtual Machine Modified to log physical memory access Phase 2: Physical Memory Logging

  6. Three benchmarks used to test arrays: 1 - Sequential Access 2 - Bubblesort 3 - Heapsort Executed using Valgrind & Bochs logging, then Analyzed Phase 3: Evaluation

  7. Results: Sequential Access... Valgrind

  8. Results: Sequential Access... Bochs

  9. Results: Bubblesort... Valgrind

  10. Results: Bubblesort... Bochs

  11. Results: Heapsort... Valgrind

  12. Results: Heapsort... Bochs

  13. Paging algorithms sacrifice optimization for generality Distinguishable access patterns exist in certain situations Conveying this information to the system could allow for optimizations Conclusions

More Related