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Detector R&D

Detector R&D . Cincinnati , FNAL, Hawaii, LBNL, Princeton, SLAC, VPI KEK, Nagoya , Niigata , Osaka , saga, Tohoku , Tokyo, TMU , Tsukuba. Contributions by US and JPN (recent 6 years). Cherenkov PID & advanced photon sensors High speed MCP PMT (SLAC, Nagoya)

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Detector R&D

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  1. Detector R&D Cincinnati, FNAL, Hawaii, LBNL, Princeton, SLAC, VPI KEK, Nagoya, Niigata, Osaka ,saga, Tohoku, Tokyo, TMU, Tsukuba

  2. Contributions by US and JPN (recent 6 years) • Cherenkov PID & advanced photon sensors • High speed MCP PMT (SLAC, Nagoya) • Focusing DIRC prototype (SLAC, Cincinati) • GaAs photocathode , TOP (Nagaoya) • 144 ch HPD for RICH counter(Nagoya) • MPGD related technology • GEM and MicroMEGAS for TPC read out (Saga,LBNL,KEK) • Gas PMT with microMEGAS structure (TMU,SLAC) • Silicon detector technologies for thin trackers • Development of light weight silicon strip ladder, high heat conducting readout hybrid(Princeton) • Continuous Acquisition Pixel (CAP) sensor(Hawaii) • EMI from short bunch beam (Tohoku/KEK/SLAC) • Development of fine pitch flexible circuit (Niigata) • Striplet sensor (KEK) • Ladder assembly(KEK) • SOI pixel

  3. Photon Sensors for Partilce ID MCP PMT for ultimate timing resolution Focusing DIRC counter with MCP-PMT Multi-pixel HPD for RICH in magnetic field GasPMT

  4. Best timing sensors for single photon sensitivity even in a high B (SLAC,TMU) • MCP-PMT (Burle85011) It is possible to reach a resolution of s ~ 50ps at 15kG.

  5. The first demonstrationof the Focusing DIRC prototype (SLAC)

  6. AC RICH with 144ch HPD (Nagoya) This corresponds to 144 ch HAPD arrangement in inner layer of real ARICH (almost) Minimum distance between HAPDs ~1.0mm MultiAlkali photocathode Photon ~13.1mrad Pixel APD 6

  7. GasPMT (TMU) • Stable operation of a bi-alkali photocathode was established. • Long term test (one year): No change in QE. • Performance of a double Micromegas PMT in a high magnetic field. • Even in 90 deg. (parallel to the window surface) 20% gain is obtained. World first demonstration for a stable operation of GasPMTwith bi-alkarine photocathode

  8. Silicon tracker

  9. Impact parameter resolution Alice Belle ATLAS ILD SLD somehow achieved 20 years ago! (JB)

  10. LHC detectors are beautiful…...but A bit heavy !? Somewhat heavy ! LHC Mega trackers

  11. Material budget is a key word Typical LHC hybrid pixel detector

  12. Belle lightweight Silicon strip ladder flex r-z short (layer 1) Two layer flex:Princeton High density Flex:Niigata Assembly:Princeton Design: KEK Jigs: Melbourne TPG Hybrid: Princeton

  13. Monolithic CMOS sensorCAP3: Hawaii CAP4 revision (Tested in the KEK-PS )

  14. SOI pixel comes next • Promising vertex detector for future collider experiment • Excellent X-ray detector for the next generation…

  15. SOI collaboration in US-JPN Slide presented at PIXEL2010 by the LBNL team

  16. MPW (Multi Project Wafer) run ~Twice per Year R&D project started by Y. Arai in KEKDTP With OKI semiconductor Coming together on SOI wafer

  17. KEK Largest Chip so far. 15 mm Integration Type Pixel (INTPIX4) 10 mm 17x17 mm, 512x832 (~430k）pixels、13 Analog Out、CDS circuit in each pixel. 17

  18. FNAL

  19. LBNL Prototype Monolithic CMOS Imagers SOI Thin CMOS • AMS 0.35mm-OPTO • LDRD-1 (2005) • 10, 20, 40mm 3T pixels • OKI 0.15mm FD-SOI • LDRD-SOI-1 (2007) • 10mm pixels, • analog & binary pixels • LDRD-2 (2006) • (+ LDRD-2RH(2007)) • 20mm pixels,in-pixel CDS • (+ RadHard pixels) • OKI 0.20mm FD-SOI • LDRD-SOI-2 (2008) • 20mm pixels, in pixel CDS • fast binary pixels • LDRD-3 (2007) • 20mm pixels, in-pixel CDS • on-chip 5-bit ADCs • SOImager (2009) • ~13mm pixels, 4x4 mm2 • imager w/ fast readout • TEAM Imager (2009) • 1kx1k 9mm pixels, analog

  20. We should collaborate… • R&D cost of advanced m-electronics is too much even for world major institutes. • Design/test facility are expensive to maintain • Persons capable of the task are very precious but few in the field. • Share the access to special/expensive resources/ companies • Mutual review/information exchange/training would be very helpful. • Easier access to the chips developed by others.

  21. More Functions in a finer pixel • Moor’s law seems saturate with 2D (planer) LSI only Physical limitations Huge R&D cost

  22. T-micro + OKI Semi + KEK/LBNL Vertical (3D) Integration Further integration with m-bump bonding (~5 um pitch) technology of T-Micro(ZyCube)

  23. Detector R&D summary Collaborations among US-J have been very fruitful for the last decade. It should be much more important for the next decades because the applications of the most advanced industrial-level technology to the detector is almost impossible for any single institute/country to realize.

  24. Biggest issue in SOI Pixl Snsor and electronics are too close Front Gate and Back Gate can couple each other Back Gate Effect 24

  25. 対策 : Buried p-Well (BPW) (b) BPW Implantation (a) PSUB Implantation Buried Oxide (BOX) SOI Si Pixel Peripheral p+(PSUB) p(BPW) • Cut Top Si and BOX • High Dose • Keep Top Si not affected • Low Dose • Suppress the back gate effect. • Shrink pixel size without loosing sensitive area. • Increase break down voltage with low dose region. • Less electric field in the BOX which may improve radiation hardness.

  26. Ids-Vgs Measurement without/with BPW with BPW=0V w/o BPW NMOS back channel open shift Back gate effect is suppressed by the BPW. 26

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