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Computer Architecture & Organization

This lecture covers the basics of computer architecture and organization instructions, including decision-making instructions, control flow instructions, compiling if-then-else statements, loops, basic blocks, branch instructions, case/switch statements, and supporting procedures.

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Computer Architecture & Organization

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  1. Computer Architecture & Organization Instructions: Language of Computer Engr. Umbreen Sabir Computer Engineering Department, University of Engg. & Technology Taxila. CA&O Lecture 03 by Engr. Umbreen Sabir

  2. Instructions for Making Decisions • Distinguishes computer from simple calculator. • Decision making Instructions are if with goto and label. • MIPS decision making statements are: • Branch if equal-> beq register1, register2, L1 • Go to label L1, if register1==register2 • Branch not equal-> bne register1, register2, L1 • Go to label L1, if register1!=register2 • These two statements are traditionally called Conditional Branches. CA&O Lecture 03 by Engr. Umbreen Sabir

  3. MIPS Control Flow Instructions • MIPS conditional branch instructions: bne $s0, $s1, Lbl #go to Lbl if $s0$s1 beq $s0, $s1, Lbl #go to Lbl if $s0=$s1 • Ex: if (i==j) h = i + j; bne $s0, $s1, Lbl1 add $s3, $s0, $s1Lbl1: … CA&O Lecture 03 by Engr. Umbreen Sabir

  4. op rs rt 16 bit offset MIPS Control Flow Instructions • Instruction Format (I format): • How is the branch destination address specified? • Keep it pending till next chapter…. CA&O Lecture 03 by Engr. Umbreen Sabir

  5. Compiling if-then-else into Conditional Branches: • In the code below f, g, h, I and j are in registers $s0 through $s4 . • C code is • if ( i==j ) f= g + h; else f=g-h; • Its assembly notation is: • Bne $s3, $s4, Else # go to Else if I != j • add $s0, $s1, $s2# f= g + h (skipped if i != j). • j Exit# go to Exit. • Else:sub $s0, $s1, #s2 # f= g – h (skipped if i == j). CA&O Lecture 03 by Engr. Umbreen Sabir

  6. Loops • Decisions are also important for iterating a computation. • Found in loops. • Refer to next slide for an example. CA&O Lecture 03 by Engr. Umbreen Sabir

  7. Example # 1 • C statements are: • While ( save[i] ==k) • i += 1; • Assume i and k are in $s3 and $s5 and base of save is in $6. • We must multiply i by 4 due to byte addressing problem. • We use shift left logical since shifting left by 2 bits multiply by 4. CA&O Lecture 03 by Engr. Umbreen Sabir

  8. Example # 1 cont. • Assembly code will be: • Loop:sll $t1, $s3, 2# Temp reg $t1 = 4 * i • Add $t1, $t1, $s6# $t1= address of save[i] • Lw $t0, 0( $t1) # Temp reg $t0 = save[i] • Bne $t0, $s5, Exit# go to Exit if save[i] != k • Add $s3, $s3, 1 # i = i + 1; • J Loop # go to Loop • Exit: CA&O Lecture 03 by Engr. Umbreen Sabir

  9. Basic Block • A sequence of instructions without branches, except possibly at the end, and without branch targets or branch labels, except possibly at the beginning. • One of the early phases of compilation is breaking the program into basic blocks. CA&O Lecture 03 by Engr. Umbreen Sabir

  10. More Branch Instructions • We have beq, bne, but what about other kinds of branches (e.g., branch-if-less-than)? For this, we need yet another instruction, slt. • Set on less than instruction: slt $t0,$s0,$s1 # if $s0 < $s1 then # $t0 = 1 else # $t0 = 0 • Instruction format (R format): op rs rt rd funct CA&O Lecture 03 by Engr. Umbreen Sabir

  11. More Branch Instructions cont. • Constant operands are also used in comparisons. • Register $zero always has 0, we can compare to zero. • To compare to other values, instruction is: • Set on less than immediate: slti $t0,$s2,10 # $t0 = 1 if $s2< 10 • MIPS doesn’t include branch on less than because it is too complicated. • Either it would stretch the clock cycle time or it would take extra clock cycles/instruction. CA&O Lecture 03 by Engr. Umbreen Sabir

  12. More Branch Instructions cont. • Can use slt, beq, bne, and the fixed value of 0 in register $zero to create all relative conditions. • less than blt $s1, $s2, Label • less than or equal to ble $s1, $s2, Label • greater than bgt $s1, $s2, Label • great than or equal to bge $s1, $s2, Label slt $at, $s1, $s2 #$at set to 1 if bne $at, $zero, Label # $s1 < $s2 CA&O Lecture 03 by Engr. Umbreen Sabir

  13. Case/switch Statement • Case/switch can be implemented through a sequence of conditional tests. • More effectively done by jump address table. • For this MIPS include a jump register instruction (jr), meaning an unconditional jump to the address specified in a register. CA&O Lecture 03 by Engr. Umbreen Sabir

  14. op 26-bit address Case/switch Statement • MIPS also has an unconditional branch instruction or jump instruction:j label #go to label. • Instruction Format (J Format): CA&O Lecture 03 by Engr. Umbreen Sabir

  15. Supporting Procedures in Computer Hardware • Procedure: A stored subroutine that performs a specific task based on the parameters with which it is provided. • Procedure execution step • Place Parameters. • Transfer control to the procedure. • Acquire storage resources • Perform desired task. • Place result value. • Return control back. CA&O Lecture 03 by Engr. Umbreen Sabir

  16. Supporting Procedures in Computer Hardware cont. • MIPS register conventions for procedures: • $a0 - $a3: argument registers • $v0 - $v1: two registers to return values. • $ra – return address register • MIPS instruction for procedures is jump and link instruction (jal). • It jumps to an address and simultaneously saves the address of following instruction in return register $ra. CA&O Lecture 03 by Engr. Umbreen Sabir

  17. Instructions for Accessing Procedures • MIPS procedure call instruction:jal ProcedureAddress #jump n link • Machine format (J format): • Then can do procedure return with a jr $ra #return • Instruction format (R format): op 26 bit address op rs funct CA&O Lecture 03 by Engr. Umbreen Sabir

  18. Next Lecture and Reminders • Next lecture • MIPS ISA • Assignment Due – 13 Feb 2009 CA&O Lecture 03 by Engr. Umbreen Sabir

  19. END OF LECTURE 3 CA&O Lecture 03 by Engr. Umbreen Sabir

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