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Compact Error Resilient Computational DNA Tiling Assemblies

Compact Error Resilient Computational DNA Tiling Assemblies. John Reif, Sudheer Sahu, Peng Yin Department of Computer Science, Duke University. 2. Self-Assembly of DNA Tiles. Perform universal computation. Manufacture patterned nanostructures from smaller unit nanostructures.

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Compact Error Resilient Computational DNA Tiling Assemblies

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  1. Compact Error Resilient Computational DNA Tiling Assemblies John Reif, Sudheer Sahu, Peng Yin Department of Computer Science, Duke University

  2. 2 Self-Assembly of DNA Tiles • Perform universal computation. • Manufacture patterned nanostructures from smaller unit nanostructures.

  3. Assembly of Binary Counter (Winfree) Computationaltiles Seedtile Frametiles Binarycounter

  4. Errors in Self-Assembly of DNA Tiles • Binding rules are not strict. • A tile might get assembled to a binding site where it was not supposed to go.

  5. Example of a Computational Error Computationaltiles Seedtile Error! Frametiles

  6. How to Decrease Errors? • Errors can be arbitrarily decreased by • Decreasing concentration of tiles. • Increasing binding strengths. • Drawback : Reduce speed. • Another approach: • Change the logical design of the tiles.

  7. Error Resilient Tilings by Winfree Original tiles: Error resilient tiles: (Excerpted from Winfree 03) • Error rate  => 2 • Assembly size increased by 4

  8. Originaltiles: A B C AB BC Errorresilienttiles:

  9. Original tiles: A B C AB BC Error resilient tiles:

  10. Originaltiles: A B C AB BC Errorresilienttiles: Error checking pads

  11. A Computational Tile

  12. Compact Error Resilient Construction • Wholeness of pad: Single pad per side.

  13. One Mismatch causes more Mismatch Case 1

  14. One Mismatch causes more Mismatch Case 2

  15. One Mismatch causes more Mismatch Case 3

  16. One Mismatch causes more Mismatch Case 4

  17. Result of Compact Error Resilient Scheme • We saw: • Two way overlay scheme. • One mismatch caused at least one more mismatch. • Error is reduced from  to 2. • Next we will see: • Three way overlay scheme. • One mismatch will cause at least two more mismatches. • Error will reduce from  to 3.

  18. Compact Error Resilient Tiles (3-way overlay) Reduce Error from  to 3

  19. Examples of Error Resilient Assembly

  20. Examples of Error Resilient Assembly

  21. Computer Simulation (Xgrow, Winfree) Three way overlay Winfree 3x3 construction Winfree 2x2 construction Two way overlay No error correction

  22. Conclusions • Assembly size not increased. • Two way overlay: error rate (5%) => 2(0.25%). • Three way overlay: error rate  (5%) => 3 (0.0125%). • Open question: error rate  => k ?

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