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EEL 4744 Microprocessor Applications

EEL 4744 Microprocessor Applications. Serial Communication Interface Presented by: Damian Szmulewicz University of Florida . Sources. TI SPRS439F: Data Manual TI SPRUFZ5A: 2823x Serial Communications Interface (SCI) Reference Guide. Pages: 12-16, 21-22, 26-35

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EEL 4744 Microprocessor Applications

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  1. EEL 4744Microprocessor Applications Serial Communication Interface Presented by: Damian Szmulewicz University of Florida

  2. Sources • TI SPRS439F: Data Manual • TI SPRUFZ5A: 2823x Serial Communications Interface (SCI) Reference Guide. • Pages: 12-16, 21-22, 26-35 • TI SPRUB0C: System Control and Interrupt Reference Guide. • Pages: 122, 123, 133, 139-142

  3. SCI Module Overview

  4. SCI Module Signals

  5. Lab-Related SCI Module Features • Two external pins: • SCITXD: SCI transmit-output pin • SCIRXD: SCI receive-input pin • Both pins can be used as GPIO if not used for SCI. • Baud rate programmable to 64K different rates • Data-word format • One start bit • Data-word length programmable from one to eight bits • Optional even/odd/no parity bit • One or two stop bits • Four error-detection flags: parity, overrun, framing, and break detection

  6. Lab-Related SCI Module Features • Transmitter and receiver operations can be accomplished through interrupt- driven or polled algorithms with status flags. • Separate enable bits for transmitter and receiver interrupts (except BRKDT) • 13 SCI module control registers located in the control register frame beginning at address 7050h

  7. SCI Peripherals and Registers • SCIA and SCIB • We have SCIB connected to the UART in our DSP board:

  8. SCI Communication Example

  9. Data Format • Two formats: • Idle-line Mode <- This is what we want for the lab • Address-bit Mode

  10. Programming Data Format • Register: SCICCR (0x7750) • For Lab 8: • 1 stop bit • No parity • N = 8 bits

  11. Baud Rate Calculations • Internally generated serial clock determined by: • Low-speed peripheral clock LSPCLK • Baud-select registers

  12. Baud Rate Calculations • Low Speed System Clock: • Low-Speed Peripheral Clock Pre-Scaler Register = 0x701B • EALLOW Protected

  13. Baud Rate Calculations Example • Given a 12Mhz external clock, calculate the BRR value for a Baud rate = 4800. Assume LSPCLK register is set to 001. • LSPCLK = SYSCLKOUT/2 = External Clock/4 = 12MHz/4 = 3MHz BRR = 3000000/(4800 * 8) -1 = 78 decimal

  14. Baud Rate Register • SCIHBAUD : 0x7752, SCIBAUD : 0x7753

  15. SCI Control Register 1 (SCICTL1) • Controls the receiver/transmitter enable, TXWAKE and SLEEP functions, and the SCI software reset. • For lab: Need to enable Tx and Rx bits (0 and 1) and re-enable the SCI by writing a 1 to bit 5 of this register.

  16. How to Transmit a Character (Polling) ? • Initialize SCI Registers • Check the Transmitter buffer register ready flag (bit 7 of SCICTL2 = 0x7754 • When SCICTL2 is set, the SCITXBUF is ready to receive a character. • Writing data to the SCITXBUF automatically clears this bit. • Wait for buffer to clear (SCICTL2 bit 7 =1) , then send another character to SCITXBUFF.

  17. SCI Interrupt Controlled • The SCICTL2 register has one flag bit (TXRDY) that indicates active interrupt conditions, and the SCIRXST register has two interrupt flag bits (RXRDY and BRKDT) • The transmitter and receiver have separate interrupt-enable bits

  18. Interrupt Using the PIE block The peripheral interrupt expansion (PIE) block multiplexes numerous interrupt sources into a smaller set of interrupt inputs

  19. The PIE Muxed Table • Shows which interrupt is connected to which peripheral:

  20. The PIE Vector Table • Shows address of interrupt vectors and function

  21. Interrupt Using the PIE block

  22. PIE Configuration and Control Reg. • The registers controlling the functionality of the PIE block:

  23. PIECTL and PIEACK • PIECTL is used to enable vector fetching from PIE vector table (bit 0). • PIEACK : • If a bit reads as a 0, it indicates that the PIE can send an interrupt from the respective group to the CPU. • Reading a 1 indicates if an interrupt from the respective group has been sent to the CPU and all other interrupts from the group are currently blocked. • Writing a 1 to the respective interrupt bit clears the bit and enables the PIE block to drive a pulse into the CPU interrupt input if an interrupt is pending for that group.

  24. PIEIER and PIEIFR • PIEIER is used to enable an interrupt within a group (x.1, x.2, x.3, etc) . • PIEIFR bits indicate whether an interrupt is currently active. • For Interrupt 9: • PIEIER9 = 0x0CF2 • PIEIFR9 = 0x0CF3 • For more info please refer to TI SPRUB0C.

  25. How to Transmit a Character (Interrupt based) ? • Set the PIECTL register to use PIE vectors instead of CPU vectors. This allows Rx and Tx to have separate ISR. • Set INT vectors to start of memory map (CLRC VMAP) • Enable INT9 on IER • Load Interrupt vector (0x0DC4) with Rx_ISR address • Load Interrupt vector (0x0DC6) with Tx_ISR address • Initialize SCI Registers • Turn on Rx and Tx INTs on SCICTL2 • Turn on Rx and Tx on SCICTL1 • Enable SCI (bit 5 of SCICTL1)

  26. How to Transmit a Character (Interrupt based) ? • In the TxISR: • Load SCITXBUF • Turn off Tx INT in PIEIER9 • Turn on Rx INT in PIEIER9 • Clear INT9 PIE group in PIEACK (bit 8) • In the RxISR: • Load SCIRxBUF • Turn off Rx INT in PIEIER9 • Turn on Tx INT in PIEIER9 • Clear INT9 PIE group in PIEACK (bit 8)

  27. Final Remarks • PIE registers are EALLOW protected • Don’t forget to set the GPxMUXs for SCIB • Don’t forget to turn on the SCIB clock • Bit 11 of PCLKCR0 register

  28. Questions???

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