存储器组织设计

1. 存储器组织设计 东南大学 电工电子实验中心 Prof. 胡仁杰 Tel:3792790 Email: hurenjie@seu.edu.cn

2. 存储器 • 系统对存储器容量及I/O容量的需求 • 系统的程序存储器（ROM） 控制程序、中断向量、数据、表格 • 系统的数据工作区（RAM） 变量工作区，数据缓冲区 数据保存区，通讯缓冲区 • IO接口寻址空间 • 开关量输入、输出、显示器、模拟通道等I/O接口

3. 存储器 • 系统寻址能力 • 8051 程序存储器64K，数据存储器64K • ADuC812 程序存储器64K，数据存储器16M • 80C196 存储器64K • 8086 存储器1024K • TMS320C240 程序存储器64K，数据存储器64K，IO寻址空间64K，全局存储器32K

4. 存储器 • 存储器的主要应用特征 • 存储器的类型： ROM：EPROM,EEPROM,FLASH RAM: SRAM,NVRAM DUAL PORT,FIFO • 存储器的字宽： 8、16、32 • 存储器的接口总线方式： 并行、串行 • 存储器的封装形式：DIP,PLCC,SO,SOJ,TSOP,BGA • 读写速度： ROM：40－120ns RAM：5－25ns

5. 存储器 • 存储器的封装形式 • SO

6. 存储器 • 存储器的封装形式 • TSOP

7. 存储器 • 存储器的封装形式 • PLCC

8. 存储器 • 存储器的封装形式 • PLCC

9. 存储器 • 存储器的封装形式 • TSOP

10. 存储器 • 存储器的封装形式 • SOJ

11. 存储器 FLASH Am29F200A • DISTINCTIVE CHARACTERISTICS • 5.0 V for read and write operations — Minimizes system level power requirements • Manufactured on 0.32 µm process technology — Compatible with 0.5 µm Am29F200A device • High performance — Access times as fast as 45 ns • Low power consumption • — 20 mA typical active read current (byte mode) • — 28 mA typical active read current for(word mode) • — 30 mA typical program/erase current • — 1 µA typical standby current

12. 存储器 FLASH Am29F200A • Sector erase architecture • — One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and three 64 Kbyte sectors (byte mode) • — One 8 Kword, two 4 Kword, one 16 Kword, and three 32 Kword sectors (word mode) • — Supports full chip erase • — Sector Protection features: • A hardware method of locking a sector to prevent any program or erase operations within that sector • Sectors can be locked via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

13. 存储器 FLASH Am29F200A • Minimum 1,000,000 write/erase cycles guaranteed • 20-year data retention at 125°C — Reliable operation for the life of the system • Package options — 44-pin SO — 48-pin TSOP • Compatible with JEDEC standards — Pinout and software compatible with single-power-supply flash — Superior inadvertent write protection • Data# Polling and Toggle Bit — Detects program or erase cycle completion • Ready/Busy# output (RY/BY#) • — Hardware method for detection of program or erase cycle completion

14. 存储器 FLASH Am29F200A

15. 存储器 FLASH Am29F200A

16. 存储器 FLASH Am29F200A

17. 存储器 SRAM CY7C1009 Features • High speed —tAA = 10 ns • Low active power —1017 mW (max., 12 ns) • Low CMOS standby power —55 mW (max.), 4 mW (Low-power version) • 2.0V Data Retention (Low-power version) • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE1, CE2, and OE options

18. 存储器 SRAM CY7C1009

19. 存储器 SRAM CY7C1009

20. 存储器 SRAM CY7C1009

21. 存储器 Dual Port SRAM CY7C132/CY7C136

22. 存储器 Dual Port SRAM • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns • Low operating power: ICC = 90 mA (max.) • Fully asynchronous operation • Automatic power-down • Master CY7C132/CY7C136 easily expands data bus width to 16 or more bits using slave CY7C142/CY7C146 • BUSY output flag on CY7C132/CY7C136; BUSY input on CY7C142/CY7C146

23. 存储器 Dual Port SRAM CY7C132/CY7C136

24. 存储器 Dual Port SRAM CY7C132/CY7C136

25. 存储器 Dual Port SRAM CY7C132/CY7C136

26. 存储器 Dual Port SRAM CY7C132/CY7C136

27. 存储器 Dual Port SRAM CY7C132/CY7C136

28. 存储器 FIFO SRAM IDT7203

29. 存储器 FIFO SRAM IDT7203 • The IDT7203 are dual-port memory buffers with internal pointers that load and empty data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. • Data is toggled in and out of the device through the use of the Write (W) and Read (R) pins. • The device's 9-bit width provides a bit for a control or parity at the user’s option. A Half-Full Flag is available in the single device and width expansion modes. • These FIFOs are fabricated using IDT’s high-speed CMOS technology. • They are designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing, rate buffering and other applications.

30. 存储器 FIFO SRAM IDT7203 • First-In/First-Out Dual-Port memory • 2,048 x 9 organization • High-speed: 12ns access time • . Low power consumption • — Active: 660mW (max.) • — Power-down: 44mW (max.) • . Asynchronous and simultaneous read and write • . Fully expandable in both word depth and width • . Status Flags: Empty, Half-Full, Full • . Retransmit capability

31. 存储器 FIFO SRAM IDT7203

32. 存储器 FIFO SRAM IDT7203

33. 存储器 FIFO SRAM IDT7203

34. 存储器 FIFO SRAM IDT7203

35. 存储器 FIFO SRAM IDT7203

36. 存储器 串行EEPROM AT24C01－256

37. 存储器 串行EEPROM AT24C01－256

38. 存储器 串行EEPROM AT24C01－256 • Low Voltage and Standard Voltage Operation 5.0V/2.7V/1.8V • Internally Organized 16,384 x 8 and 32,768 x 8 • 2-Wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility • Write Protect Pin for Hardware and Software Data Protection • 64-Byte Page Write Mode (Partial Page Writes Allowed) • Self-Timed Write Cycle (5 ms typical) • High Reliability – Endurance: 100,000 Write Cycles – Data Retention: 40 Years – ESD Protection: > 4000V • Automotive Grade and Extended Temperature Devices Available

39. 存储器 串行EEPROM AT24C01－256

40. 存储器 串行EEPROM AT24C01－256

41. 存储器 串行EEPROM AT24C01－256

42. 存储器 串行EEPROM AT24C01－256

43. 存储器 串行EEPROM AT24C01－256

44. 存储器 存储器应用设计 • 存储器组织设计 • 存储器地址分配 • 程序存储器地址分配 • 数据存储器地址分配 • 选择存储器芯片 • 芯片的位数 • 芯片的容量

45. 存储器 存储器应用设计 • 地址译码 • 高位地址选择芯片 • 低位地址选择单元 存储器组织容量1MByte，芯片容量128KByte 0000,0000,0000,0000,0000－0001,1111,1111,1111,1111 0010,0000,0000,0000,0000－0011,1111,1111,1111,1111 0100,0000,0000,0000,0000－0101,1111,1111,1111,1111 0110,0000,0000,0000,0000－0111,1111,1111,1111,1111 ………. 1110,0000,0000,0000,0000－1111,1111,1111,1111,1111 • 读写控制

46. 存储器 存储器应用设计

47. 存储器 存储器应用设计 • 扩充程序存储器和数据存储器

48. 存储器 存储器应用设计 • 扩充程序存储器和数据存储器

49. 存储器 存储器应用设计 • 复用总线的地址锁存

50. 存储器 存储器应用设计 • 程序存储器扩充