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Analyzing Repair Decisions in the Site Imbalance Problem of Semiconductor Test Machines

Analyzing Repair Decisions in the Site Imbalance Problem of Semiconductor Test Machines. Chen-Fu Chien, Member, IEEE, and Jei-Zheng Wu This paper appears in: IEEE Transactions on Semiconductor Manufacturing, Vol. 16, No. 4, November 2003. OR Seminar Presentation

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Analyzing Repair Decisions in the Site Imbalance Problem of Semiconductor Test Machines

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  1. Analyzing Repair Decisions in the Site Imbalance Problem of Semiconductor Test Machines Chen-Fu Chien, Member, IEEE, and Jei-Zheng Wu This paper appears in: IEEE Transactions on Semiconductor Manufacturing, Vol. 16, No. 4, November 2003 OR Seminar Presentation Teacher: Pros. 陳茂生, Pros. 阮約翰 Student: 937807 張幼蘭 2005/5/26

  2. Introduction (1/2) • Functional test facility: one handler service multiple test head; test multiple IC devices simultaneously. • When testing the same group of devices, the yield rates of certain sites may deviate from the other sites, called “site imbalance”.

  3. Introduction (2/2) • Many studies focus on scheduling algorithms and dispatching rules to increase test efficiency. But, the unstable processing environment impacts more. • This study construct a framework of repair/close/continue decision while considering test profit, cycle time, overdue cost and the lost of falsely failed chips.

  4. Problem Structuring (1/3) • Each test may fail in two ways: • Defective units may pass (type I error) • Good units may fail (type II error) • The false passed rate is controlled to almost zero to avoid penalty and maintain the goodwill of the company. • p : true good rate • ui : site yield rate

  5. Problem Structuring (2/3) • To reduce yield loss, those devices failed in N0 test will be tested again in N1 test. • The action of saving current testing results and conditions is called a lot end.

  6. Problem Structuring (3/3) • Site-imbalance decisions is driven at each lot end. 3 alternatives: • continue the test without any action • Close the deviated sites • Stop testing to repair the whole machine • Machine repair time remains unknown before shutting down the machine to examine it.

  7. Notations

  8. Identify Decision Elements

  9. Formulating Objective Functions (1/3) • Fundamental objectives: maximize testing profit and enhance customer satisfaction. • Formulated as monetary attributions • Objective function: • Dij : alternative given specific conditions • P : profit generated by passed IC devices • T : opportunity cost for the time to complete the testing • O : overdue penalty • Y : penalty for abnormal yield loss

  10. Formulating Objective Functions (2/3)

  11. Formulating Objective Functions (3/3)

  12. Decision Tree

  13. Allowable Repair Time

  14. Numerical Illustration (1/3) n=32 Q1 = 387 c = 11.05 v = 1.44 per second ts = 23.51 second per unit

  15. Numerical Illustration (2/3) • On-site operators closed 14 sites. The testing process took 28 time units and the real total passed units were 322 IC devices

  16. Numerical Illustration (3/3) • Close Site 1, 7 get the estimated 318.54 passed units but would only take 13 time units. • ART = 4.85 min.

  17. Contributions • Evaluate the company’s fundamental objectives specifically. • ART provides a useful index to prioritize the repair jobs. • Assist on-site operators in making specific decision in various conditions.

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