Chapter 0 Introduction to Computing

1. Chapter 0 Introduction to Computing

2. Objective • 這個章節讓我們複習computer的運作方式。特別是CPU如何讀取程式，如何地執行。 • 所以如果大家對computer還是不大瞭解，一定要好好讀一讀這一章，回答每一個小節的Review Questions，以及最後的Problems。 • Review Questions的答案在Problems之後。

3. Outlines • Section 1: Numbering and coding systems • Section 2: Digital primer • Section 3: Inside the computer

4. Section 0.1Numbering and Coding Systems

5. Outlines of Section 0.1 • Decimal and binary number systems • Converting between decimal and binary • Hexadecimal system • Converting between binary and hex • Counting in bases 10, 2, and 16 • Addition and subtraction of hex number • ASCII codes (here we use 8-bit for each code) • Please review the items if you have forgotten them.

6. Hexadecimal Notation Bit Hexadecimal Pattern digit---------- -------------- 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 9 1010 A 1011 B 1100 C 1101 D 1110 E 1111 F • Hexadecimal system is based on 16 and is used as a convenient representation of binary number. • Hexadec is Greek for 16. • There are 16 symbols: 0-9, A,B,C,D,E,F. • A 4-bit pattern can be represented by a hexadecimal digit, and vice versa. • Ex: 01011010B=5AH

7. ASCII Examples

8. Two's Complements Format • To store an positive integer K in N bits: • Change K to binary format. 0’s are added to the left to the number to make a total of N bits. • To store an negative integer -K in N bits: 1. Find the one’s complement of -K. 2. Add 1 to its one’s complement. Decimal: -6  K=6: 0000 0110  1’s complement 1111 1001  add 1 to it  2’s complement 1111 1010 Two’s complement: FAH 1 1 1 1 1 0 1 0

9. Questions • Put the decimal integer 60 into an 8-bit allocation by using unsigned integer representation. Show your result in hexadecimal notation. • Put the decimal integer -60 into an 8-bit allocation by using 2’s complement representation. Show your result in hexadecimal notation.

10. Section 0.2Digital Primer

11. Outlines of Section 0.2 • Binary Logic • Logic Gates - AND, OR, NOT, XOR, NAND, NOR • Logic design using gates • Decoders • Flip-flops • Please review the items if you have forgotten them.

12. Section 0.3Inside the Computer

13. Outlines of Section 3 • Some important terminology • Internal organization of computers • More about the data bus • More about the address bus • CPU and its relation to RAM and ROM • Inside CPUs • Internal working of computers

14. Some Important Terminology • Bit 0 • Nibble 0000 (4 bits) • Byte 0000 0000 (8 bits) • Word 0000 0000 0000 0000 0000 0000 0000 0000 (32 bits) • KB (kilobyte)＝210 bytes • MB (megabyte)＝220 bytes • GB (gigabyte)＝230 bytes • TB (terabyte)＝240 bytes

15. Figure 0-9: Inside the Computer • Every computer can be broken down into three parts： • CPU (Central Processing Unit) • Memory：RAM,ROM, etc. • I/O (Input/Output) devices：Peripherals

16. Memory • Memory is a collection of storage locations. • Data are transferred to and from memory in group of bits called words. • A words can be a group of 8 bits (i.e., byte), 16 bits (2-byte word), 32 bits (4-byte word) or 64 bits. • Each word is identified by an address.

17. 0 1 2 3 4 5 6 7 Address Example 1 contents (values) address word • A word size of 4 byte • An address space that ranges from 0 to 7. • 4 byte × 8 = 32 bytes • A 32 bytes memory 000 001 010 011 100 101 110 111 • FF01 4512 • 12E3 3310 • C590 FE3A • 2345 • EECD • 44AE • 23CA 889E • DB31 67AA 32 bit needs 32 devices.

18. Address Example 2 • A word size of 1 byte • 16 bits are used for the address. • Addresses are from 0 to 65,535(=216-1). • 1 byte  216 words =64K bytes memory • 216 = 26 210 =64  1K =64K

19. ROM v.s. RAM • ROM (read only memory) • For permanent data which cannot changed by the user • ROM contains programs and information essential to operation of the computer. • Data does not lost when powers off • Called as nonvolatile memory • RAM (random access memory) • For temporary storage of programs that it is running • Data lost when power off • Called as volatile memory

20. RAM • DRAM (Dynamic RAM) • Using capacitors • If the capacitor is charged, the state is 1; if it uncharged, the state is 0. • Because capacitor loses some of its charge with time, memory cells need to be refreshed periodically. • DRAMs are slow but inexpensive. • SRAM (Static RAM) • Using flip-flop gate to hold data • No need for refreshing • SRAMs are fast but expensive. • Video RAM, Window RAM, NV-RAM...

21. ROM • PROM (Programmable ROM) • PROM is blank when the computer is shipped. • When programs are stored, it cannot be overwritten. • EPROM (Erasable PROM) • It can be erased with a special device that applies ultraviolet light. • EEPROM (Electronically EPROM) • It can be programmed and erased using electronic impulses without being removed form the computer. • Flash memory

22. Central Processing Unit (CPU) • CPU performs operations on data. • CPU has three parts: arithmetic logic unit (ALU), control unit, a set of registers.

23. Arithmetic logic unit (ALU) • Perform the arithmetic and logic operations • Simplest arithmetic operations: • Increment (add 1), decrement (subtract 1) • Add, subtract • Simple logic operations • NOT, AND, OR, XOR • Shift • Memory transfer • Move

24. Registers (1/2) • Fast stand-alone storage locations that hold data temporarily • Data Register (R) • R0..Rn • Hold data or address R5 R3 ADD R4

25. Registers (2/2) • Instruction Register (IR) • Store instruction • Program Counter (PC) • Store the address of instruction PC Memory IR Fetch

26. Instructions, states... Control Unit Fetch wires 0 0 0 1 Execute Decode ALU performs Increment Instruction Cycle Control Unit • Control the operations of CPU • Using wires to send commands

27. Bus • CPU is connected to memory and I/O through strips of wire called a bus. • Buses are used to Communicate between the computer components. • Data Bus • Address Bus • Control Bus Control bus Address bus I/O device CPU Memory Data bus

28. The Operation of Bus • For a device (memory or I/O) to be recognized by the CPU, it must be assigned an address. • The address of every device must be unique. • The CPU puts the address on the address bus, and the decoding circuitry finds the device. • The CPU uses the data bus either to get data from that device or to send data to it. • The control buses are used to provide read or write signals. • The address bus and data bus determine the capacity of a given CPU.

29. AddressMemory Control bus 00H 92 01H 15 02H 22 03H AE Read Address bus 03H ...... CPU FCH 3E FDH 21 FEH 0D FFH A5 Data bus AEH Example of Reading Data

30. Data Bus • The processing power of a computer is related to the size of its buses. • The more data buses available, the better the CPU. • Example：8 bits（slow）, 16 bits, 32 bits, 64 bits（fast）. • An 8-bit data bus can send 1 byte a time. • Data buses are bi-directional. • More data buses mean a more expensive CPU and computer. 8 lines for a 8-bit bus

31. Address Bus • The number of address lines determines the number of locations with which a CPU can communicate. • The more address buses available, the larger the number of devices that can be addresses. • Example：8 bits（small）, 16 bits, 32 bits（large）. • A 16-bit address bus can indicate 216=64K bytes of addressable memory for 8-bit CPU. • Regardless of the size of the data bus. • Address buses are unidirectional.

32. a clock 10 1.4 GHz Machine Clock • One bit is sent/received on a wire in a clock period. • Clock is used to synchronize work of the components on the machine. • Clock decides the performance of the computer. a machine cycle a machine cycle crystal oscillator

33. Questions 1. Apple II with an 8-bit data bus. What is the maximum value of unsigned integer that can be brought into CPU at a time? 2. Find the total amount of memory for a CPU with 32-bit address bus (in MB and GB). Assume an 8-bit data bus is used.

34. Instruction Set and Programs • Instruction set: A set of instructions designed for a CPU • We write a program based on this instruction set. • The program is usually stored in RAM. • The instruction to be run is moved to IR (instruction register), explained and executed at CPU. Fetch  Decode  Execute • The process to perform the operation of an instruction is called machine cycle.

35. Program Execution • CPU uses repeatingmachine cycles to execute instructions in the program, one by one, from beginning to end. • A cycle can consists of three steps: fetch, decode, and execute.

36. The Machine Cycle by instruction decoder by ALU

37. Contents before Execution

38. Content after Each Cycle (1/4) +14 Load 200 R1 071

39. Content after Each Cycle (2/4) +14 -10 Load 201 R2 072

40. Content after Each Cycle (3/4) +14 -10 +4 Add R1 R2 R3 073

41. Content after Each Cycle (4/4) +14 -10 +4 Store 202 R3 +4 074

42. Internal Organization of Computers Example • 8-bit data bus • 16-bit address (for a total of 10000H locations) • address 0000H-FFFFH Address Bus CPU read /write RAM ROM Printer Disk Monitor Keyboard Data Bus Control Bus Figure 0-10 Internal Organization of Computers

43. Program Example Action Code Data Move value 21H into register A B0H 21H Add value 42H to register A 04H 42H Add value 12H to register A 04H 12H

44. Inside Memory Memory address 1400 B0 code for moving a value into register A 1401 21 value to be moved 1402 04 code for adding a value to register A 1403 42 value to be added 1404 04 code for adding a value to register A 1405 12 value to be added 1406 00 code for halt Contents Meaning

45. Actions Performed by the CPU（1/3） • The PC is set to the value 1400H, indicating the address of the first instruction code to be executed. • The CPU puts 1400H on the address bus and sent it out. The PC is added by 1. • The memory circuitry finds 1400H while the CPU activates the READ signal, indicating to memory that CPU wants the byte at location 1400H. • The content of memory location 1400H, which is B0H, to be put on the data bus and brought into the CPU. • The CPU decodes the instruction B0H. PC=1400 PC=1401 PC=1401, IR=B0

46. Actions Performed by the CPU（2/3） • The CPU performs the moving instruction： • The control circuitry ask the content from memory location 1401 (saved in PC). • The PC is added by 1. • Put the value 21H to register A. • After completing one instruction, the PC points to the address of the next instruction to be execute (i.e., 1402H.) • From the memory location 1402H. The CPU fetches code 04H. The PC add 1. • The CPU decoding 04H and ask the parameter in 1403H. The PC add 1. A = ?, PC=1402, IR=B0 A = 21H, PC=1402, IR=B0 A = 21H, PC=1403, IR=04 A = 21H, PC=1404, IR=04

47. Actions Performed by the CPU（3/3） • The ALU executes the add instruction and sets the value 63H to register A. • From the memory location 1404H, CPU fetches code 04H. The CPU decoding it and ask the parameter. The ALU executes the add instruction and sets the value 75H to register A. • The content of address 1406 are fetched in and executed. This HALT instruction tells the CPU to stop incrementing PC and asking for the next instruction. A = 63H, PC=1404, IR=04 A = 75H, PC=1406 IR=04 A = 75H, PC=1407, IR=00