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TEAM “EPA” ELECTRONIC PIN ART

TEAM “EPA” ELECTRONIC PIN ART. Preliminary Design Review Spring 2006. Jonathan Persinger Jonathan Snyder Henry Au-Yeung Devon Dallmann Khushboo Verma. An array of pins to display a variety of 3-D images such as: Pictures Drawing Text/Braille Movies Games

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TEAM “EPA” ELECTRONIC PIN ART

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  1. TEAM “EPA”ELECTRONIC PIN ART Preliminary Design Review Spring 2006 Jonathan Persinger Jonathan Snyder Henry Au-Yeung Devon Dallmann Khushboo Verma

  2. An array of pins to display a variety of 3-D images such as: Pictures Drawing Text/Braille Movies Games Integration with topography software (i.e. Google Earth) Project Description

  3. Implementation • Solenoid actuation • PWM Control • 256pin Resolution • Software Algorithms and Programming • Image Processing • Embedded Interface communications • Electronic Hardware • Solenoid controller/selection • Compact Flash interface • External Memory • Power regulation

  4. Power Requirements • Each Solenoid requires a maximum of 400mA to set. (~1-2W) • Maximum Current will occur at column reset where 16 solenoids will be activated at once => 16 x 0.400A x 5V=32watts • Several voltage rails will be needed to run the logic cores and solenoids.

  5. System Overview

  6. Goals Goals • 16x16 pin matrix • 4 Levels of pin height • Static images • Single pic in memory • One column reset resolution • Joystick drawing Extra • Moving pictures • Joystick gaming • LCD/picture menu • USB transceiver • DSP filters Fallback • Braille/Text • LEDs • Total Grid Reset • Image Processing in MATLAB • Hand Reset • 4x4 Matrix

  7. Processor • TMS470R1A256 • 32-bit ARM7TDMI core (industrial applications) • 64 KB to 1MB flash memory • 12 KB static ram • Clock speed up to 24 MHz • 14 High-resolution I/O channels • I2C/SPI capable

  8. Clock Standard bus interface (IIC, SPI, etc.) SPI allows for full duplex and any length instructions Counters and/or timers are critical for pin height resolutions. CPLDs offers consistent delays. Pin for pin compatibility with a CPLD with more Function blocks 4 function blocks 21 GPIOs One function block must have at least 16 Macrocells & 16 I/Os. +5v tolerance for compatibility with hardware logic and drivers. CPLD Requirements

  9. CPLD Design uProc 4 ERROR W/ Inst# SPI State machine Increment Instruction Instruction Packet 19 Decoder Parity 8bit Inst# 3bit Z 4bit X 2bit OP Error Checking Timer Decoder Logic Gates (ANDs ORs etc.) Inst# | Row 16b | inc Clmn | RST Clmn | PWM | HW-Busy

  10. Driver Circuit Objectives: • Control of 256 individual solenoids • Minimal part count per pin (cost control!) • Must have the ability to switch polarity on Solenoids • EMI / ESD / EMF suppression & protection • Critical Routing, isolation of current carrying grounds and signal grounds • Design in manual control and circuit isolation for easier debugging.

  11. Proof of Concept: Pin Selection

  12. Proof of Concept:

  13. Solenoid Physics

  14. Solenoid Physics • Pulse duration controls height • Trade offs: larger N, less current needed, larger L, larger time constant

  15. Image Processing • Process BMP, JPEG images • Use MATLAB for image processing • Obtain color matrix • Algorithm to calculate height of the pin • Obtain x and y location for each pixel along with the height • Store post-processed image to Compact flash • Compile the image to MSP470 assembly • Communicate between CPLD and Microprocessor via Standard Peripheral/Bus Interface • Read information from compact flash • Determine memory mapping to locate pictures on card

  16. CPLD Verilog • State machine to fix PWM & frequency • Translation of post-processed image to one column at a time versus PWM Duration • Miscellaneous Logic • Pin reset • Column select • Multiplexing/Decoding

  17. Division of Labor • Henry—Power management; PCB layout; mechanical design • Khushboo—Image processing • Jonathan S.—Solenoid control; System integration • Devon—Solenoid design; programming • Jon P—Programming; PCB layout

  18. Gantt Chart

  19. Parts/Costs

  20. Risks • Processor/CPLD implementation • Prior experience limited • IC Communication problems • SPI integration complexity • Flash memory access (proprietary?) • Cost/Availability • Manufactured solenoids: Cost? Turn around? Many parts are multiplied by 256 (runaway costs). Coil and pin manufacture as of now is difficult. • Coils • High switched currents could cause re-triggering • Pin height tolerance (all or nothing could result) • Mechanical • Tolerance of solenoid diameter and Rig spacing • Longevity of moving parts

  21. Marketability • Visually impaired via. Braille coding • Novelty item—place on mantel with wave motion for relaxation • USGS/Boy scout elevation profiles • Automated tattooer • Back massager

  22. Questions & Comments ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?

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