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Lecture Overview

Computer Organization Lecture 1 Course Introduction and the Five Components of a Computer Modified From the Lectures of Randy H. Katz UC Berkeley. Lecture Overview. Intro to Computer Architecture (30 minutes) Administrative Matters (5 minutes) Course Style, Philosophy and Structure (15 min)

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Lecture Overview

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  1. Computer OrganizationLecture 1Course Introductionand the Five Components of a ComputerModified From the Lectures of Randy H. KatzUC Berkeley

  2. Lecture Overview • Intro to Computer Architecture (30 minutes) • Administrative Matters (5 minutes) • Course Style, Philosophy and Structure (15 min) • Break (5 min) • Organization and Anatomy of a Computer (25 min)

  3. What is “Computer Architecture”? Computer Architecture = • Instruction Set Architecture + • Machine Organization + …

  4. SOFTWARE Instruction Set Architecture(subset of Computer Architecture) “... the attributes of a [computing] system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” – Amdahl, Blaaw, and Brooks, 1964 • Organization of Programmable Storage • Data Types & Data Structures: • Encodings & Representations • Instruction Set • Instruction Formats • Modes of Addressing and Accessing Data Items and Instructions • Exceptional Conditions

  5. Computer Architecture’s Changing Definition • 1950s to 1960s Computer Architecture Course • Computer Arithmetic • 1970s to mid 1980s Computer Architecture Course • Instruction Set Design, especially ISA appropriate for compilers • 1990s Computer Architecture Course • Design of CPU, memory system, I/O system, Multi-processors, Networks • 2000s Computer Architecture Course: • Special purpose architectures, Functionally reconfigurable, Special considerations for low power/mobile processing

  6. The Instruction Set: a Critical Interface software instruction set hardware

  7. Example ISAs (Instruction Set Architectures) • Digital Alpha (v1, v3) 1992-97 • HP PA-RISC (v1.1, v2.0) 1986-96 • Sun Sparc (v8, v9) 1987-95 • SGI MIPS (MIPS I, II, III, IV, V) 1986-96 • Intel (8086,80286,80386, 1978-00 80486,Pentium, MMX, ...) Itanium/I64 2002-

  8. MIPS R3000 Instruction Set Architecture(Summary) Registers • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate jump target OP Q: How many already familiar with MIPS ISA?

  9. ISA Level FUs & Interconnect Organization • Capabilities & performance characteristics of principal functional units • (e.g., Registers, ALU, Shifters, Logic Units, ...) • Ways in which these components are interconnected • Information flows between components • Logic and means by which suchinformation flow is controlled • Choreography of FUs to realize the ISA • Register Transfer Level (RTL) Description Logic Designer's View

  10. Control Datapath The Big Picture • Since 1946 all computers have had 5 components Processor Input Memory Output

  11. Example Organization • TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20 MBus Module SuperSPARC Floating-point Unit L2 $ CC DRAM Controller Integer Unit MBus MBus control M-S Adapter L64852 Inst Cache Ref MMU Data Cache STDIO SBus serial kbd SCSI Store Buffer SBus DMA mouse Ethernet audio RTC Bus Interface SBus Cards Boot PROM Floppy

  12. What is “Computer Architecture”? Application • Coordination of many levels of abstraction • Under a rapidly changing set of forces • Design, Measurement, and Evaluation Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout

  13. Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Cleverness Operating Systems History

  14. Technology DRAM chip capacity Microprocessor Logic Density • In ~1985 the single-chip processor (32-bit) and the single-board computer emerged • workstations, personal computers, multiprocessors have been riding this wave since • In the 2002+ timeframe, these may well look like mainframes compared to single-chip computers (maybe 2 chips) DRAM Year Size 1980 64 Kb 1983 256 Kb 1986 1 Mb 1989 4 Mb 1992 16 Mb 1996 64 Mb 1999 256 Mb 2002 1 Gb

  15. Technology Trends Imply Dramatic Change • Processor • Logic capacity: about 30% per year • Clock rate: about 20% per year • Memory • DRAM capacity: about 60% per year (4x every 3 years) • Memory speed: about 10% per year • Cost per bit: improves about 25% per year • Disk • Capacity: about 60% per year • Total data use: 100% per 9 months! • Network Bandwidth • Bandwidth increasing more than 100% per year!

  16. Performance Trends Supercomputers Mainframes Minicomputers Log of Performance Microprocessors Y ear 1970 1975 1980 1985 1990 1995

  17. Applications and Languages • CAD, CAM, CAE, . . . • Lotus, DOS, . . . • Multimedia, . . . • The Web, . . . • JAVA, . . . • The Net => ubiquitous computing • ???

  18. As reported in Microprocessor Report, Vol 13, No. 5: Emotion Engine: 6.2 GFLOPS, 75 million polygons per second Graphics Synthesizer: 2.4 Billion pixels per second Claim: Toy Story realism brought to games! Computers in the News: Sony Playstation 2000

  19. Arithmetic Single/multicycle Datapaths IFetch Dcd Exec Mem WB µProc 60%/yr. (2X/1.5yr) 1000 CPU IFetch Dcd Exec Mem WB “Moore’s Law” IFetch Dcd Exec Mem WB 100 Processor-Memory Performance Gap:(grows 50% / year) IFetch Dcd Exec Mem WB 10 Performance DRAM 9%/yr. (2X/10 yrs) DRAM 1 Pipelining 1980 1982 1984 1987 1988 1989 1990 1991 1993 1996 2000 1981 1983 1985 1986 1992 1994 1995 1997 1998 1999 I/O Time Memory Systems Where are We Going?? CS152 Fall ’02 

  20. CS152: Course Content Computer Architecture and Engineering Instruction Set Design Computer Organization Interfaces Hardware Components Compiler/System View Logic Designer’s View ­“Building Architect” ­“Construction Engineer”

  21. CS 152: So What's In It For Me? • In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. • Insight into fast/slow operations that are easy/hard to implementation hardware • Out-of-order execution and branch prediction • Experience with the design processin the context of a large complex (hardware) design. • Functional Spec --> Control & Datapath --> Physical implementation • Modern CAD tools • Designer's "Conceptual" toolbox

  22. Conceptual Tool Box? • Evaluation Techniques • Levels of translation (e.g., Compilation) • Levels of Interpretation (e.g., Microprogramming) • Hierarchy (e.g, registers, cache, mem, disk,tape) • Pipelining and Parallelism • Static / Dynamic Scheduling • Indirection and Address Translation • Synchronous and Asynchronous Control Transfer • Timing, Clocking, and Latching • CAD Programs, Hardware Description Languages, Simulation • Physical Building Blocks (e.g., CLA) • Understanding Technology Trends

  23. Course Structure Design Intensive Class --- 100 hours per semester per student • Lectures (rough breakdown): • Review: 2 weeks on ISA, arithmetic • 1 1/2 weeks on technology, HDL, and arithmetic • 3 1/2 weeks on standard proc. design and pipelining • 2 weeks on memory and caches • 1 1/2 weeks on Memory and I/O • 2 weeks on special topics: low power, network as the backplane, edge processors • 2 weeks exams, presentations MIPS Instruction Set ---> Standard-Cell implementation Modern CAD System : Schematic capture and Simulation Design Description Computer-based "breadboard" • Behavior over time • Before construction

  24. Course Administration • Instructor: Fu-Chiung Cheng (fccheng@ttu.edu.tw) A5-707 Office Hours(Tentative): Wens 11:00-12:00 • TAs: TBA • Materials: http://www.cse.ttu.edu.tw/~cheng/courses/comporg.htm • Text: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 2nd Ed., 1998. Hennessy and Patterson, Computer Architecture, A Quant-itative Approach, 3rd Ed., 2003. (recommended as an advanced reference)

  25. Grading • 4 Tests 40% • 1 Midterm exam 25% (chap 1~4) • 1 Final exam 30% (chap 1-8) • Participation in class 5%

  26. Instructors’ Goals • Show you how to understand modern computer architecture in its rapidly changing form • Show you how to design by leading you through the process on challenging design problems • Learn how to test things • NOT to talk at you • So ... • ask questions • come to office hours • find me in the lab • ...

  27. lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) Levels of Representation (61C Review) temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; High Level Language Program Compiler Assembly Language Program Assembler 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Language Program Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK ° °

  28. Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Execution Cycle Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

  29. All have interfaces & organizations Um…. It’s the network stupid???! It’s All About Communication Pentium III Chipset Proc Caches Busses adapters Memory Controllers Disks Displays Keyboards I/O Devices: Networks

  30. Summary • All computers consist of five components • Processor: (1) datapath and (2) control • (3) Memory • (4) Input devices and (5) Output devices • Not all “memory” are created equally • Cache: fast (expensive) memory are placed closer to the processor • Main memory: less expensive memory--we can have more • Interfaces are where the problems are - between functional units and between the computer and the outside world • Need to design against constraints of performance, power, area and cost

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