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A Progressive Approach for Satisfiability Modulo Theories

A Progressive Approach for Satisfiability Modulo Theories. Hossein M. Sheini Karem A. Sakallah Electrical Engineering and Computer Science University of Michigan, Ann Arbor, Michigan, USA Constraints and Verification 2006 Isaac Newton Institute for Mathematical Sciences. Outline.

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A Progressive Approach for Satisfiability Modulo Theories

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  1. A Progressive Approach for Satisfiability Modulo Theories Hossein M. Sheini Karem A. Sakallah Electrical Engineering and Computer Science University of Michigan, Ann Arbor, Michigan, USA Constraints and Verification 2006 Isaac Newton Institute for Mathematical Sciences

  2. Outline • Problem formulation; applications • Algorithmic components • Boolean solver • Unit 2-variable-per-inequality integer solver • General-purpose ILP solver • Solution strategies • Related approaches • Experimental evaluation • Conclusions and future work ARIO / Sheini & Sakallah

  3. Satisfiability Modulo TheoriesConjunctive Normal Form (SMT-CNF) • Variables: • Boolean: • Integer: • Atoms: • Boolean variable • Integer UTVPI • Integer constraint • Literal: atom or negation of atom • Clause: disjunction of literals • Formula: conjunction of clauses ARIO / Sheini & Sakallah

  4. Given a SMT-CNF formula SMT-CNF • Find an assignment to all Boolean (and integer) variables such that • OR prove that no such solution exists ARIO / Sheini & Sakallah

  5. Satisfiability Modulo Theories (SMT) • SMT is the problem of deciding the satisfiability of a quantifier-free formula in one or more first-order theories. • Theories of interest are logics of: • Equality (E) • Integer Unit-Two-Variable-Per-Inequality (UTVPI) (U) • Integer Linear Arithmetic (C) ARIO / Sheini & Sakallah

  6. Satisfiability Modulo Theories (SMT) • SMT formula ARIO / Sheini & Sakallah

  7. Example SMT-CNF Instance ARIO / Sheini & Sakallah

  8. Applications of SMT • Verification (SW, HW) • Model checking of timed automata • Microprocessor verification • Program verification • Buffer over-run vulnerabilities • Scheduling • Temporal reasoning • Job-shop scheduling ARIO / Sheini & Sakallah

  9. MIB-CNF Instance Boolean Solver UNSAT UNSAT SAT ILP Solver SAT Solution Algorithm: Version 1 Invoke Solvers Sequentially • Enumerate Boolean solutions • Check consistency of implied integer constraints ARIO / Sheini & Sakallah

  10. Problem Decomposition: Indicator Variables ARIO / Sheini & Sakallah

  11. Boolean Satisfiability • DPLL-style search to find a solution to a Boolean CNF formula or to prove no such solution exists • Major algorithmic advances in last decade • Conflict analysis • Clause recording (learning) • Non-chronological backtracking • Efficient BCP using watched literals • Random restarts • Adaptive decision heuristics (VSIDS, etc.) • MiniSAT [N. Eén, N. Sörensson, “An Extensible SAT-solver” SAT’03] ARIO / Sheini & Sakallah

  12. UTVPI Integer Constraint Solver Jaffar et al’s polynomial-time incremental algorithm • Maintain a transitively-closed and tightened set of UTVPI constraints • Generate and add all implied UTVPI constraints every time a new constraint is added ARIO / Sheini & Sakallah

  13. UTVPI Algorithm Example ARIO / Sheini & Sakallah

  14. Algorithm Version 1 Boolean Solver Formula Decision Tree Implication Graph ARIO / Sheini & Sakallah

  15. and return to Boolean solver Add conflict clause Algorithm Version 1 UTVPI Solver Boolean Solution Formula ARIO / Sheini & Sakallah

  16. Pros/Cons of Version 1 Algorithm • Pros • Loose integration of Boolean and UTVPI/ILP solvers • Cons • Late detection of conflicts • Inability to analyze UTVPI/ILP conflicts • Possibility of enumerating several solutions that are inconsistent for the same reason • Extra work if unsatisfiability is due to “logical constraints” ARIO / Sheini & Sakallah

  17. Solution Algorithm: Version 2 • Integrate UTVPI solver into the Boolean solver • Check consistency of relevant integer constraints off-line with a generic ILP solver ARIO / Sheini & Sakallah

  18. Algorithm Version 2 ARIO / Sheini & Sakallah

  19. Algorithm Version 2 ARIO / Sheini & Sakallah

  20. Positive unate in all B variables Solution Algorithm: Version 3 Conservatively abstract formula Replace equality with one-way implication ARIO / Sheini & Sakallah

  21. Algorithm Version 3 ARIO / Sheini & Sakallah

  22. Final Version of Combined Algorithm • Always: Enforce only one-way implication from indicator variable to its UTVPI constraint • Sometimes: Enforce equality between indicator variable and its UTVPI constraint when computationally cheap ARIO / Sheini & Sakallah

  23. Final Version on Example Formula ARIO / Sheini & Sakallah

  24. Handling non-UTVPI Constraints UTVPI constraints sharing both variables with non-UTVPI constraints Solution So far: to Integer Programming Solver UNSAT ARIO / Sheini & Sakallah

  25. Offline Learning: Cutting Planes NEW ARIO / Sheini & Sakallah

  26. Learning on Example Formula ARIO / Sheini & Sakallah

  27. Progressive Solving Scheme • Gradual Concretization of the Formula = Gradual Activation of Theory Solvers ARIO / Sheini & Sakallah

  28. Implementation • ARIO Satisfiability Modulo Theories (SMT) Solver written in C++ • More info at: http://www.eecs.umich.edu/~ario ARIO / Sheini & Sakallah

  29. Comparison to Other Methods DPLL(T) -Ario Version 2 Ario Version 1 MathSAT Strategy for Linking Theories UCLID equality X X X X X Ario Final X Ario Version 3 MLLP conditional X X X X Big-M Simplex/B&B Branch-and-Check Lazy Tight Eager Strategy for Solving Theories ARIO / Sheini & Sakallah

  30. Experimental Evaluation • Wisconsin Safety Analysis (WiSA) • Fischer's mutual exclusion protocol • MathSAT CIRC • CIRC – Safety Checking of RTL Circuits ARIO / Sheini & Sakallah

  31. Wisconsin Safety Analysis (WiSA) ARIO / Sheini & Sakallah

  32. Wisconsin Safety Analysis (WiSA) ARIO / Sheini & Sakallah

  33. Fischer's Mutual Exclusion Protocol(Encoded for MathSAT) ARIO / Sheini & Sakallah

  34. MathSAT CIRC Suite • Generated for MathSAT, verifying properties for some simple circuits. *Copied from MathSAT TACAS 2005 paper comparing accumulated time of CIRC benchmarks for MathSAT, CVC and ICS ARIO / Sheini & Sakallah

  35. RTCL - Safety Properties for RTL Circuits ARIO / Sheini & Sakallah

  36. Conclusions and Future Work • Judicious integration/”use” of solvers • Boolean reasoning (constraint propagation, conflict analysis, non-chronological backtracking, etc.) is key to scalability • Incrementality is essential for performance • Further benchmarking, tuning, competition? ARIO / Sheini & Sakallah

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