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Chapter 8 Virtual Memory

Chapter 8 Virtual Memory

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Chapter 8 Virtual Memory

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  1. Chapter 8Virtual Memory Operating Systems:Internals and Design Principles Seventh Edition William Stallings

  2. Operating Systems:Internals and Design Principles You’re gonna need a bigger boat. — Steven Spielberg, JAWS, 1975

  3. Hardware and Control Structures • Two characteristics fundamental to memory management: • all memory references are logical addresses that are dynamically translated into physical addresses at run time • a process may be broken up into a number of pieces that don’t need to be contiguously located in main memory during execution • If these two characteristics are present, it is not necessary that all of the pages or segments of a process be in main memory during execution

  4. Terminology

  5. Execution of a Process Continued . . . Operating system brings into main memory a few pieces of the program Resident set - portion of process that is in main memory An interrupt is generated when an address is needed that is not in main memory (segment/page fault) Operating system places the process in a blocking state

  6. Execution of a Process • Piece of process that contains the logical address is brought into main memory • operating system issues a disk I/O Read request • another process is dispatched to run while the disk I/O takes place • an interrupt is issued when disk I/O is complete, which causes the operating system to place the affected process in the Ready state

  7. Implications • More processes may be maintained in main memory • only load in some of the pieces of each process • with so many processes in main memory, it is very likely a process will be in the Ready state at any particular time • A process may be larger than all of main memory

  8. Real and Virtual Memory

  9. Table 8.2 Characteristics of Paging and Segmentation

  10. Thrashing

  11. Principle of Locality Program and data references within a process tend to cluster Only a few pieces of a process will be needed over a short period of time Therefore it is possible to make intelligent guesses about which pieces will be needed in the future Making good guesses avoids thrashing

  12. Paging Behavior During the lifetime of the process, references are confined to a subset of pages

  13. Support Needed for Virtual Memory

  14. Paging • The term virtual memory is usually associated with systems that employ paging • Use of paging to achieve virtual memory was first reported for the Atlas computer • Each process has its own page table • each page table entry contains the frame number of the corresponding page in main memory • Entry k contains the frame # of page k (if page k is in memory)

  15. Memory Management Formats

  16. Address Translation

  17. Simple PT Structure Simple page table: one PT per process Size is a problem – for 32-bit addresses, half for OS, half for user space, the number of pages in a user process is 232/pagesize. For pagesize = 210, page table would have 222 entries. PER PROCESS! Solution? Page the page table!

  18. Hierarchical PT Structure Still, one PT per process, but only load the parts being used; e.g, a two-level page table consists of A page directory, or root page table, in which each entry points to a small page table The individual page tables, each of which points to a portion of the total virtual address space

  19. Hierarchical PT Example For a 32-bit address, 4-Kbyte (212) pages: Simple address: 20-bit page #, 12-bit offset Hierarchical address: 20-bit page # is now split into two parts: 10 bits to select an entry in the root page table and 10 bits to select an entry in the corresponding smaller page table Regardless of the page table format, there are 220 pages of length 212.

  20. Two-Level Hierarchical Page Table

  21. Address Translation

  22. Inverted PT Structure • Simple page tables, hierarchical page tables occupy a lot of space: each process has its own PT, size of each PT is proportional to size of virtual address space. • Another approach: one page table maps everything in memory. Page table size is fixed.

  23. Inverted PT Structure • Page number portion of a virtual address is mapped into a hash value • hash value points to inverted page table • Fixed proportion of real memory is required for the tables regardless of the number of processes or virtual pages supported • Structure is called inverted because it indexes page table entries by frame number rather than by virtual page number

  24. Inverted Page Table

  25. Inverted Page Table Each entry in the page table includes:

  26. Virtual Memory Problems • Page tables can occupy large amounts of memory • Solution: hierarchical or inverted page tables • Address translation using page tables increases execution time • Solution: Translation Lookaside Buffer (TLB)

  27. Translation LookasideBuffer (TLB) • To overcome the effect of doubling the memory access time, most virtual memory schemes make use of a special high-speed cache called a translation lookaside buffer • Each virtual memory reference can cause two physical memory accesses: • one to fetch the page table entry • one to fetch the data (or the next instruction)

  28. Use of a TLB

  29. TLB Operation

  30. Associative Mapping • The TLB only contains some of the page table entries so we cannot simply index into the TLB based on page number • each TLB entry must include the page number as well as the complete page table entry • The processor is equipped with hardware that allows it to interrogate simultaneously a number of TLB entries to determine if there is a match on page number

  31. Direct Versus Associative Lookup

  32. TLB and Cache Operation

  33. Page Size • The smaller the page size, the lesser the amount of internal fragmentation • however, more pages are required per process • more pages per process means larger page tables • for large programs in a heavily multiprogrammed environment some portion of the page tables of active processes must be in virtual memory instead of main memory • the physical characteristics of most secondary-memory devices favor a larger page size for more efficient block transfer of data

  34. Paging Behavior of a Program

  35. Example: Page Sizes

  36. Page Size • Contemporary programming techniques used in large programs tend to decrease the locality of references within a process

  37. Segmentation Segmentation allows the programmer to view memory as consisting of multiple address spaces or segments

  38. Segment Organization Each segment table entry contains the starting address of the corresponding segment in main memory and the length of the segment A bit is needed to determine if the segment is already in main memory Another bit is needed to determine if the segment has been modified since it was loaded in main memory

  39. Address Translation

  40. Combined Paging and Segmentation

  41. Address Translation

  42. Combined Segmentation and Paging

  43. Protection and Sharing Segmentation lends itself to the implementation of protection and sharing policies Each entry has a base address and length so inadvertent memory access can be controlled Sharing can be achieved by segments referencing multiple processes

  44. Protection Relationships

  45. REVIEW Virtual memory: a technique for executing processes that aren’t entirely in memory which provides the illusion of large memory Use a combination of RAM + disk Swap parts of the program (pages) in and out of memory as needed Page tables keep track of the pages Problems: page table storage, extra memory references.

  46. Operating System Software

  47. Policies for Virtual Memory • Key issue: Performance • minimize page faults

  48. Fetch Policy Determines when a page should be brought into memory

  49. Demand Paging • Demand Paging • only brings pages into main memory when a reference is made to a location on the page • many page faults when process is first started • principle of locality suggests that as more and more pages are brought in, most future references will be to pages that have recently been brought in, and page faults should drop to a very low level

  50. Prepaging • Prepaging • pages other than the one demanded by a page fault are brought in • exploits the characteristics of most secondary memory devices • if pages of a process are stored contiguously in secondary memory it is more efficient to bring in a number of pages at one time • ineffective if extra pages are not referenced • should not be confused with “swapping”