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Tackling the search for Lepton Flavor Violation with GHz waveform digitizing using the DRS chip. Stefan Ritt Paul Scherrer Institute, Switzerland. Agenda. MEG Experiment searching for m e g down to 10 -13. DRS1. DRS2. DRS3. Motivation. Why should we search for m e g ?.
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Tackling the search forLepton Flavor Violationwith GHz waveform digitizing using the DRS chip Stefan Ritt Paul Scherrer Institute, Switzerland
Agenda MEG Experiment searching for me g down to 10-13 DRS1 DRS2 DRS3 Fermilab
Motivation Why should we search for m e g ?
The Standard Model Generation I II III *) Yet to be confirmed Fermilab
The success of the SM • The SM has been proven to be extremely successful since 1970’s • Simplicity (6 quarks explain >40 mesons and baryons) • Explains all interactions in current accelerator particle physics • Predicted many particles (most prominent W, Z ) • Limitations of the SM • Currently contains 19 (+10) free parameters such as particle (neutrino) masses • Does not explain cosmological observation such as Dark Matter and Matter/Antimatter Asymmetry Today’s goal is to look for physics beyond the standard model CDF Fermilab
High Energy Frontier • Produce heavy new particles directly • Heavy particles need large colliders • Complex detectors • High Precision Frontier • Look for small deviations from SM (g-2)m , CKM unitarity • Look for forbidden decays • Requires high precision at low energy Beyond the SM Find New Physics Beyond the SM Fermilab
The Muon • Discovery: 1936 in cosmic radiation • Mass: 105 MeV/c2 • Mean lifetime: 2.2 ms Seth Neddermeyer ne W- e- Carl Anderson ≈ 100% m- nm 0.014 < 10-11 led to Lepton Flavor Conservationas “accidental” symmetry Fermilab
g W- m- e- nm ne LFV and Neutrino Oscillations • Neutrino Oscillations Neutrino mass m e g possible even in the SM LFV in the charged sector is forbidden in the Standard Model n mixing Fermilab
g g W- m- e- m- e- nm ne LFV in SUSY • While LFV is forbidden in SM, it is possible in SUSY ≈ 10-12 Current experimental limit: BR(m e g) < 10-11 Fermilab
m→ e g mA→ eA m→ eee History of LFV searches • Long history dating back to 1947! • Best present limits: • 1.2 x 10-11 (MEGA) • mTi → eTi < 7 x 10-13 (SINDRUM II) • m → eee < 1 x 10-12 (SINDRUM II) • MEG Experiment aims at 10-13 • Improvements linked to advancein technology cosmic m 10-1 10-2 10-3 10-4 10-5 stopped p 10-6 10-7 m beams 10-6 stopped m 10-9 10-10 10-11 SUSY SU(5) BR(m e g) = 10-13 mTi eTi = 4x10-16BR(m eee) = 6x10-16 10-12 10-13 MEG 10-14 10-15 1940 1950 1960 1970 1980 1990 2000 2010 Fermilab
ft(M)=2.4 m>0 Ml=50GeV 1) Current SUSY predictions current limit MEG goal tan b “Supersymmetric parameterspace accessible by LHC” • J. Hisano et al., Phys. Lett. B391 (1997) 341 • MEGA collaboration, hep-ex/9905013 W. Buchmueller, DESY, priv. comm. Fermilab
Experimental Method How to detect m e g ?
Decay topology m e g 52.8 MeV m e g N g 52.8 MeV m 180º Eg[MeV] 10 20 30 40 50 60 e N 52.8 MeV • m→ e g signal very clean • Eg = Ee = 52.8 MeV • qge = 180º • e and g in time 52.8 MeV Ee[MeV] 10 20 30 40 50 60 Fermilab
g g n m n n n m e e “Accidental” Background Background m e g g m e nn m Annihilation in flight 180º e m e nn • m→ e g signal very clean • Eg = Ee = 52.8 MeV • qge = 180º • e and g in time Good energy resolution Good spatial resolution Excellent timing resolution Good pile-up rejection Fermilab
How can we achieve a quantum step in detector technology? Previous Experiments Fermilab
Collaboration • ~70 People (40 FTEs) from five countries Fermilab
Proton Accelerator Swiss Light Source Paul Scherrer Institute Fermilab
PSI Proton Accelerator Fermilab
MEG beam line Rm ~ 1.1x108m+/s at experiment e+ m+ s ~ 10.9 mm m+ Fermilab
H.V. Refrigerator Signals Cooling pipe Vacuum for thermal insulation Al Honeycomb Liq. Xe window PMT filler Plastic 1.5m Liquid Xenon Calorimeter • Calorimeter: Measure g Energy, Positionand Time through scintillation light only • Liquid Xenon has high Z and homogeneity • ~900 l (3t) Xenon with 848 PMTs(quartz window, immersed) • Cryogenics required: -120°C … -108° • Extremely high purity necessary:1 ppm H20 absorbs 90% of light • Currently largest LXe detector in theworld: Lots of pioneering work necessary g m Fermilab
Use GEANT to carefully study detector • Optimize placement of PMTs according to MC results Fermilab
The complete MEG detector Fermilab
Current resolution estimates Fermilab
1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 R&D Set-up Engineering Data Taking MEG Current Status • Goal: Produce “significant” result before LHC • R & D phase took longer than anticipated • Detector has been completed by theend of 2007 • Expected sensitivity in 2008: 2 x 10-12(current limit: 1 x 10-11) http://meg.psi.ch Fermilab
Pile-up in the DC system • Pile-up can severely degrade the experiment performance ( MEGA Experiment) ! • Traditional electronics cannot detect pile-up TDC Need fullwaveform digitization > 100 MHz to reject pile-up Discriminator Measure Time Amplifier hits Moving average baseline Fermilab
Beam induced background • 108m/s produce 108 e+/s produce 108g/s Cable ductsfor Drift Chamber Fermilab
m e Pile-up in the LXe calorimeter n PMT sum 0.511 MeV meg radiativemuon decay 51.5 MeV 50 51 52 E[MeV] t ~100ns (menn)2 + g • g’s hitting different parts of LXe can be separated if > 2 PMTs apart (15 cm) • Timely separated g’s need waveform digitizing > 300 MHz • If waveform digitizing gives timing <100ps, no TDCs are needed g e m Fermilab
Requirements summary • Need 500 MHz 12 bit digitization for Drift Chamber system • Need 2 GHz 12 bit digitization for Xenon Calorimeter + Timing Counters • Need 3000 Channels • At affordable price Solution: Develop own“Switched Capacitor Array” Chip Fermilab
The Domino Principle 0.2-2 ns Inverter “Domino” ring chain IN Waveform stored Out FADC 33 MHz Clock Shift Register “Time stretcher” GHz MHz Keep Domino wave running in a circular fashion and stop by trigger Domino Ring Sampler (DRS) Fermilab
Switched Capacitor Array • Cons • No continuous acquisition • No precise timing • External (commercial) FADC needed • Pros • High speed (~5 GHz) high resolution (~12 bit equiv.) • High channel density (12 channels on 5x5 mm2) • Low power (10 mW / channel) • Low cost (< 100$ / channel incl. VME board) Dt Dt Dt Dt Dt Fermilab
Linear inverter chain causes non-linearity Folded Layout Fermilab
“Tail Biting” speed enable 1 2 3 4 1 2 3 4 Fermilab
I DRS2 DRS3 Sample readout DRS1 Tiny signal 20 pF 0.2 pF Temperature Dependence ~kT Fermilab
DRS3 • Fabricated in 0.25 mm 1P5M MMC process(UMC), 5 x 5 mm2, radiation hard • 12 ch. each 1024 bins,6 ch. 2048, …, 1 ch. 12288 • Sampling speed 10 MHz … 5 GHz • Readout speed 33 MHz, multiplexedor in parallel • 50 prototypes receivedin July ‘06 Fermilab
VME Board 40 MHz 12 bit FADC USB adapter board 32 channels input General purpose VPC board built at PSI Fermilab
Bandwidth + Linearity • Readout chain shows excellent linearity from 0.1V … 1.1V @ 33 MHz readout • Analog Bandwidth is currently limited by high resistance of on-chip signal bus, will be increased significantly with DRS4 0.5 mV max. 450 MHz (-3dB) Fermilab
Signal-to-noise ratio • “Fixed pattern” offset error of 5 mV RMScan be reduced to 0.35 mV by offsetcorrection in FPGA • SNR: • 1 V linear range / 0.35 mV = 69 dB (11.5 bits) Offset Correction Fermilab
12 bit resolution <8 bits effective resolution 11.5 bits effective resolution Fermilab
Sampling speed • Unstabilized jitter: ~70ps / turn • Temperature coefficient: 500ps / ºC • How far wan we go? • 0.250 um technology: 8 GHz • 0.130 um technology: 15 GHz ~200 psec Vspeed PLL Reference Clock (1-4 MHz) R. Paoletti, N. Turini, R. Pegna, MAGIC collaboration Fermilab
Timing Reference domino wave signal 20 MHz Reference clock 8 inputs PMT hit shift register Domino stops after trigger latency Reference clock MUX • Calibrate inter-cell Dt’s for each chip • 200 ps uncertainty using PLL • 25 ps uncertainty for timing relative to edge Fermilab
What timing can be obtained? • Detailed studies by G. Varner1) for LAB3 chip • Bin-by-bin calibration using a 500 MHz sine wave • Accuracy after calibration: 20 ps 1ns 1) G. Varner et al., Nucl.Instrum.Meth. A583, 447 (2007) Fermilab
On-chip PLL Simulation: loop filter DRS4 Vspeed PLL Reference Clock fclk = fsamp / 2048 • On-chip PLL should show smaller phase jitter • If <100ps, no clock calibration required Fermilab
Comparison with other chips Fermilab
Waveform Analysis What can we learn from acquired waveforms?
On-line waveform display S848 PMTs “virtual oscilloscope” template fit click pedestal histo Fermilab
QT Algorithm original waveform t • Inspired by H1 Fast Track Trigger (A. Schnöning, Desy & ETH) • Difference of Samples (= 1st derivation) • Hit region defined when DOS is above threshold • Integration of original signal in hit region • Pedestal evaluated in region before hit • Time interpolated using maximum value and two neighbor values in LUT 1ns resolution for 10ns sampling time Region for pedestal evaluation integration area smoothed and differentiated (Difference Of Samples) Threshold in DOS Fermilab
Pulse shape discrimination a g Leading edge Decay time AC-coupling Reflections Fermilab
t-distribution ta = 21 ns tg = 34 ns Waveforms can be clearly distinguished a g Fermilab
Coherent noise SiVi (t) All PMTs Pedestal average Charge integration • Found some coherent low frequency (~MHz) noise • Energy resolution dramatically improved by properly subtracting the sinusoidal background • Usage of “dead” channels for baseline estimation Fermilab
Pileup recognition DT 8ns DT 50ns original DT 10ns DT 100ns derivative Dt = 15ns E1 E2 MC simulation DT 15ns Rule of thumb: Pileup can be detected if DT ~ rise-time of signals Fermilab