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Advanced Techniques in Multiplier Design for High-Speed Computations

Explore signed and unsigned multiplication methods, 2’s complement systems, serial and parallel multiplier schemes, and the application of Booth and modified Booth algorithms in optimizing multiplication processes. Dive into canonical recoding and array multiplier designs for reduced product terms and enhanced speed.

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Advanced Techniques in Multiplier Design for High-Speed Computations

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  1. Multiplications • 4x4 Signed Multiplication • 2’s Complement: X= –xn–12n–1+Unsigned • Y*X=Z

  2. 2’s C Sequential MUL 1-1 • ADD Y if xi =1( i=0 to n–2); Shift • SUB Y if xn-1 =1; Shift • EX:Y= – 5, X=3

  3. 2’s C Sequential MUL 1-2 • ADD Y if xi =1( i=0 to n–2); Shift • SUB Y if xn-1 =1; Shift

  4. 1’s C Sequential MUL 1-1 • 1’s C: X= –xn–1(2n–1–ulp) +Unsigned • A(0)= Y(ulp) if xn–1 =1 else A(0)=0 • ADD Y if xi =1( i=0 to n–2); Shift • SUB Y if xn-1 =1; Shift • EX1: Y= 5, X= – 3

  5. 1’s C Sequential MUL 1-2 • 5* – 3 = – 22 ???

  6. 1’s C Sequential MUL 1-3 • 5* – 3 = – 15

  7. 1’s C Sequential MUL 1-4 • – 5* – 3 = 10 !!! What’s wrong???

  8. 1’s C Sequential MUL 1-5 • End around carry: – 5* – 3 = 12!!!???

  9. 1’s C Sequential MUL 1-6 • Add 1s instead of 0’s: – 5* – 3 = 15 O.K.

  10. Compare 2’sC & 1’sC Seq. MUL • 2’C : n-bit adder & 2n-bit Shift Reg. • 1’C : 2n-bit adder & 2n-bit Shift Reg.

  11. Multiplications(2) • Two SUB; (n-2) ADD • X*Y=Z=(z1, z2, …zn)

  12. Multiplications(3) • 4x4 Signed Multiplication • Sign extension • One SUB; (n-2) ADD

  13. Multiplications(4) • 4x4 Signed Multiplication • all ADD (2n)

  14. Multiplications(5) • 4x4 Signed Multiplication • all ADD (2n–1)

  15. Serial Multiplications (1)

  16. Serial Multiplications(2) • Serial Multiplication Scheme X0Y0

  17. Serial Multiplications(3) • Serial Multiplication Scheme Z0 X1Y1 W10 +W01 W11

  18. Serial Multiplications(4) • Serial Multiplication Scheme Z1 X2Y2 W21 +W12 V2 +W20 +W02 W22

  19. Serial Multiplications(5) • Serial Multiplication Scheme Z2 X3Y3 V3 +W30 +W03 V4 +W31 +W13 W32 +W23 W33

  20. Serial Multiplications(6) • Serial Multiplication Scheme Z3 V4 +W30 +W03 V5 +W31 +W13 V6 +W32 +W23 W33 +W33 +W33

  21. Serial Multiplications(7) • Serial Multiplication Scheme Z4 V5 +W30 +W03 V6 +W31 +W13 V7 +W32 +W23 +W33 +W33

  22. Serial Multiplications(7) • Serial Multiplication Scheme Z5 V6 +W30 +W03 V7 +W31 +W13 +W32 +W23 +W33 +W33

  23. Serial Multiplications(7) • Serial Multiplication Scheme Z6 V7 +W30 +W03

  24. Serial/Parallel Multiplier(1-1)

  25. Serial/Parallel Multiplier(1-2)

  26. Serial/Parallel Multiplier(2)

  27. Serial/Parallel Multiplier(3-1)

  28. Serial/Parallel Multiplier(3-2)

  29. Serial/Parallel Multiplier(4-1)

  30. Serial/Parallel Multiplier(4-2)

  31. Serial/Parallel Multiplier(4-3)

  32. Serial/Parallel Multiplier(5)

  33. High-Speed Multiplications • Reduce Partial Product terms • Accelerate Addition • 3 Types of Multiplication • Parallel MUL • HS Seq. MUL • Array MUL

  34. Reduce Partial Product terms • Booth Algorithm • Concept: A* 0011...110= A*0100…0(–1)0 • Ex. Old PP#=4, New PP# =2

  35. Booth Algorithm • Booth Algorithm • A*X A*Y • Conversion Table (right) • Start from LSB (add a 0) • Overlap 1 bit • EX: A*01110011  A*0 1110011 (0)  A* 100(–1)010(–1)

  36. Booth Algorithm(2) • 0100*0111  0100*100(–1)

  37. Booth Algorithm(3) • 1011*1101  1011*0(–1)1 (–1)

  38. Modified Booth Algorithm • Drawbacks • ADD/SUB Variable • Inefficient for isolate 1s • Modified Booth Alg. • Scan 3-bit at a time • Overlap 1-bit • If n= Even, it can handle 2’s C #

  39. Modified Booth Algorithm(2) • Original • 1011*1101  1011*0(–1)1 (–1) • Now • 1011*110 1(0)  1011*0(–1)01

  40. Canonical Recoding • Find min. +/– for MUL: •  Find min. SD representation •  Find min.  |yi| • Z=(z1, z2, …zn) is min. if • zizi+1 =0 • (111) is min. but zizi+1 0 • Canonical Recoding • Find such Z • Using sequence step

  41. Canonical Recoding(2) • EX:Assume C0=0 • X=011001  z0=1, c1=0 • X=01100  z1=0, c2=0 • X=0110  z2=0, c3=0 • X=011  z3= –1, c4=1 • X=01  z4=0, c5=1 • X=(0)0  z5=1, c6=0 • Z= 10(–1)001

  42. Array Multipliers • Conventional CSM

  43. Array Multipliers(2) • Conventional CSM

  44. Array Multipliers (3-0) • Pezaris Array Multiplier • – 1 = – 2•1+1 • 0 = – 2•0+ 0

  45. Array Multipliers(3) • Pezaris Array Multiplier

  46. Array Multipliers(4) • Modified Pezaris Array Multiplier

  47. Array Multipliers (5-01) • Baugh-Wooley Array Multiplier • –24x4 •yi2i (i=0 to 3)= –(0,0, x4y3,…, x4y0) 24 •  ADD (1, 1, y’3,…, y’0) 24 ADD 24 if x4=1 • or ADD 0 if x4=0 • [(1, x’4, x4y’3,…, x4y’0) ADD (0,1,0…, x4)]24 • So is –24y4 •xi2i (i=0 to 3) • {(1, x’4+y’4, [x4y’3+x’3y4],…, [ x4y’0+ y4x’0 + x4+y4]} 24

  48. Array Multipliers (5-02) • Baugh-Wooley Array Multiplier

  49. Array Multipliers(5) • Baugh-Wooley Array Multiplier

  50. Array Multipliers(6) • The On-the-fly CSM

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