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반도체의 주요 응용 분야 : 통신 및 신호처리와 반도체

반도체의 주요 응용 분야 : 통신 및 신호처리와 반도체. 전남대학교 김영철. http://edu.idec.or.kr. 서론 통신 이론 통신과 반도체 통신용 반도체의 설계 통신과 반도체의 미래 결론. 목 차. 서 론. 반도체공학개론. 학습 목적 및 목표. 학습목적 반도체 설계의 주요 응용분야 중 하나인 통신에 대해서 알아보고 통신용 반도체 설계에 대해서 이해한다 학습목표 통신의 중요성을 인식한다 통신과 반도체의 관계를 이해한다 통신용 반도체의 설계에 대해서 이해한다. Internet.

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반도체의 주요 응용 분야 : 통신 및 신호처리와 반도체

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  1. 반도체의 주요 응용 분야 : 통신 및 신호처리와 반도체 전남대학교 김영철 http://edu.idec.or.kr

  2. 서론 • 통신 이론 • 통신과 반도체 • 통신용 반도체의 설계 • 통신과 반도체의 미래 • 결론 목 차

  3. 서 론 반도체공학개론

  4. 학습 목적 및 목표 학습목적 • 반도체 설계의 주요 응용분야 중 하나인 통신에 대해서 알아보고 통신용 반도체 설계에 대해서 이해한다 학습목표 • 통신의 중요성을 인식한다 • 통신과 반도체의 관계를 이해한다 • 통신용 반도체의 설계에 대해서 이해한다

  5. Internet server 우리 생활의 통신 시스템

  6. 아날로그 VCR LP판 카세트 테이프 TV 카메라 캠코더 AM, FM 전화기 디지털 DVR CD MP3 디지털 TV 디지털 카메라 디지털 캠코더 DAB 핸드폰 아날로그와 디지털

  7. Media Convergence 화상통화/캠코더/DSC VOD / MP3 WLAN/UWB 지원 3D Game PC 차세대 휴대폰 Source: SIEMENS Personal G/W Navigator Health

  8. 반도체공학개론 통신이론

  9. 아날로그 통신 Carrier Message Signal Amplitude-Modulated Signal Frequency-Modulated Signal

  10. 디지털 통신 시스템의 구성도 Source Coding Channel Coding Modulation Multiple Access Source Decoding Channel Decoding Demodulation Multiple Access

  11. Source and Channel Coding channel source coding channel coding channel decoding source decoding

  12. Channel Coding: Error Detection Parity Check • Even parity • 01010 001010 • Odd parity • 01010 101010

  13. Channel Coding: Error Correction - 1 (3,1) code • 0  000 • 1  111 If 010 is received, • decision = 0 If 011 is received, • decision = 1

  14. Channel Coding: Error Correction - 2 (5,2) code • 00  00000 • 01  01011 • 10  10101 • 11  11110 If 01000 is received, • decision = 00 If 01010 is received, • decision = 01

  15. Digital Modulation Phase Shift Keying Frequency Shift Keying Amplitude Shift Keying

  16. Amplitude Shift Keying Transmitter Baseband signal Am Bandpass signal Am cos2fct Carrier cos2fct Receiver Decision cos2fct

  17. Multiple Access Multiple Access • Sharing of medium by many users • Purpose • 각각의 통신 채널에 상호 독립성을 보장하기 위함 • communication resource를 효과적으로 사용하기 위함 FDMA(Frequency Division Multiple Access)가 기본 • 모든 무선 통신은 기본적으로 FDMA

  18. Frequency-Division Multiple Access user 4 Guard band Frequency user 3 Guard band user 2 Guard band user 1 Time

  19. Time-Division Multiple Access Frequency user 1 user 2 user 1 user 2 Guard time Guard time Guard time Guard band Time

  20. Code-Division Multiple Access Direct Sequence CDMA user 1, 2, 3, 4 Frequency Time

  21. 통신과 반도체 반도체공학개론

  22. Applications Beat Moore’s Law Battery Capacity

  23. Handphone Hardware

  24. BBA RF DISCRETE Down Conv Rx AGC LNA Up Conv PA PLL Tx AGC BASEBAND ANALOG CHIP Video On Demand MODEM PROCESSOR SOFTWARE CDMA 단말기 구조 - 1 LCD Application S/W UI 고주파 회로 전송 주파수대역으로 신호를 변환 RF 고주파수 합성기 필요한 주파수 신호를 발생 PLL Baseband Analog Processor 기저대역 신호처리 Modem Processor 음성신호를 Digital로 변환 하고 SOFTWARE와 함께 송수신의 모든 작업을 수행하는 핵심부품 모뎀 통신 S/W (Layer 1,2,3) Battery

  25. CDMA 단말기 구조 - 2 Base- Band Analog Mobile Station Modem LCD 증폭기 필터 증폭기 키 패드 주파수합성 Duplexer 코덱 증폭기 필터 증폭기 스피커

  26. SOC(System On a Chip) 1995년 2003년 CPU DSP CPU DSP Mem Logic System Memory Logic • 0.5m • 20만 gate • 표준 VLSI • 0.13m • 1000만 gate • System의 1 chip化

  27. RISC uP DSP I/O User Block mem cntr memory memory 전형적인 SOC의 형태 • 1M + gates • Intellectual Property (IP) • H/W & S/W Codesign • System Level Verification Tools • Deep Submicron Technology • Mixture of Blocks • Microprocessor • DSP • Embeded Memory • I/O & Bus interface • User defined ASIC Logic

  28. SCH800 SOC사례: CDMA 모뎀 Product: SCOM3000, CDMA modem processor Die Size: 76 x 8 ㎟ ( 035um ) 2MB Protocol Stack Software ARM RISC & OAK DSP 8K/13K QCELPS Speech Coders 8K EVRC Speech Code 16msec Acoustic Echo Canceller DFM (AMPS) Firmware Speech Recognition SCRATCH SRAM CDMA AMPS MODEM DSP PROCESSOR DSP PGM ROM DSP DATA SRAM OAK Peri Viterbi Decoder DATA ROM ARM CPU ARM Peri

  29. Communication Algorithms Analog Baseband and RF Circuits Protocols Hardwired Logic Hardwired Algorithms (word level) RTOS Logic (bit level) phone book MAC ARQ Control A Analog FSM D FFT Filters Coders digital analog mP Core DSP Core Typical Wireless System Using SOC

  30. 통신 반도체 설계 반도체공학개론

  31. 휴대폰 개발 프로세스 상용 단말 FPGA Algorithm 개발 모뎀 ASIC (ES,CS) 표준 규격 통합시험 통신 S/W (Layer 1,2,3 S/W) • 디자인 • RF • HW • 응용 SW • RF • HW • Simple UI • 시험장비 • 기지국

  32. HW/SW Codesign & Coverification

  33. Top-down Design Concept Architecture Design Performance Optimization Synthesized Netlist RTL Spec Optimized Netlist Netlist with Test RTL & Gate Design Spec Iterations Refinements/ ECOs Optimizations Test Insertion Clk Tree Insertion Physical Design Physical Optimization Place & Route

  34. SoC Design Methodology Issues Methodology Spec. Design Verification Behavioral Design System-level design SOC Verification Architectural Design IP Reuse DFT and Test SOC Issue RTL to GDS SW Design RTL Design Signal & Design Integrity VDSM Issue Chip Imple- mentation System Integration

  35. Abstraction Accuracy Challenges in Very Deep-Submicron Design • SOC • Time-to-market • Larger die, larger database • Larger design space • Long wires, more density • Higher clock speeds • Reuse, IP’s • VDSM • Higher resistance • Higher cross-coupling • Non-linear timing • IR drop • Electromigration • Inductance • Capcitance Require detailedanalysis to understand physical interactions Need abstraction levels to manage complexity

  36. Design Tradeoff (Performance vs. Flexibility) Performance (Speed & Power & Cost) ASIC/ASSP SoC Goal SoC platform Programmable (uP, DSP or FPGA) Flexibility & Time to Market Source : DesignCon2001 (Chameleon)

  37. 1000 Dedicated HW Different form traditional FPGA technology 100 Reconfigurable Processor / Logic Pleiades, MorphICs 10 Energy Efficiency MOPS/mW (or MIPS/mW) ASIP/DSPs 2 V DSP: 3 MOPS/mW 1 Embedded Processors SA110 0.4 MIPS/mW 0.1 FPGA 0.01 Flexibility (Coverage) Source : Jan Rabaey (UCB) The Energy-Flexibility Gap

  38. SoC Tech. SoC Technology Architecture • Software Defined Radion (SDR) • Reconfigurable Microprocessor • Network on a Chip Low Power • Dynamic Voltage Scaling • Non-Volatile Logic Silicon Process Design Methodology • System in Package (SIP) • MEMS • Nanotechnology • Platform-based Design • Reusable Ips • HW/SW Codesign and • Coverification

  39. CPU

  40. DSP CPU vs. DSP • CPU • 범용 • DSP (Digital Signal Processor) • Digital Signal Processing 용도로 특화되어 설계되어 있음 Characteristics of DSP algorithms • Computation-intensive • Multiplication-intensive • Special computation • Data intensive • Large amount of data • No locality in data (Cache is not very useful) • Iterative • For-loop • Real-time

  41. 통신과 반도체의 미래

  42. Beyond 3G = 4G Integrated Wireless MM 3G Information bit rate ? W-CDMA/CDMA2000 Mobile Internet 2G MBS BB-WLANs GSM 1G Voice + Data CDMA Voice 1972 1992 2002 2012 2022 이동통신

  43. 무선통신 Bluetooth Wireless LAN (WiFi) Wireless MAN ZigBee 휴대인터넷 (WiBro) UWB WiMax

  44. 통신 시스템들의 융합

  45. Home 이동통신 (GSM, cdma) Access Home Gateway ISP ISP Voice Core Edge ISP ISP Voice/Data Hot spot AP AP AP AP Office Enterprise Downtown Population Center BTS BTS ISP: Internet Service Provider, AP: Access Point Ubiquitous & Seamless Service

  46. Processor Algorithm Algorithm RTL RTL RTL RTL µP RTL RTL RTL RTL Memory Algorithm µP µP RTL RTL RTL RTL RTL RTL RTL RTL RTL RTL I/O Mem RTL RTL RTL RTL Mem RTL RTL RTL RTL RTL RTL RTL RTL RTL I/O RTL RTL RTL RTL RTL RTL I/O RTL RTL RTL RTL SoC Crisis

  47. SOC 시대에는 시스템과 반도체의 구분이 없음 • 통신 VLSI의 개발을 위해서는 시스템, 알고리즘, 하드웨어, 결 론 소프트웨어가 동시에 고려되어야 함

  48. 참고문헌 • S. Haykin, "Communication Systems", John Wiley & Sons, 4th edition, 2001 • Chapter 2: Continuous-Wave Modulation • Chapter 6: Passband Digital Transmission • Chapter 7: Spread Spectrum Modulation • Chapter 10: Error Control Coding • B. Sklar, "Digital Communications: Fundamentals and Applications", Prentice Hall, 2001 • Chapter 1: Signals and Spectra • Chapter 4: Bandpass Modulation and Demodulation • www.ieee802.org

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