1 / 9

IPN template project architecture

IPN template project architecture. 19th Feb 2013. RegMap (MMR mirror). RegMap functional global variable.

kyra-cline
Télécharger la présentation

IPN template project architecture

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. IPN template project architecture 19th Feb 2013

  2. RegMap • (MMR mirror) RegMap functional global variable • The RegMap FGV is essentially a lookup table for all the DUTs register values. The information in the Regmap FGV is derived from the DUT Coda files. Note: A GUI is provided to build the .regmap file from a set of coda files. • The global_attributes_configurationGUI will load the RegMap FGV into memory. • The CODA_Register_Interface GUI provides the user with a graphical means of accessing and display the information in the RegMap FGV. • The Read and Write framework VIs will update the RegMap as they update or read from the part.

  3. global_attribute_configuration • Synch with DUT global_attribute_configuration GUI. • This GUI provides a high level interface to configure global attributes of a project. • Communication protocol. (Uart, HSDIO SW, MiDAS SW, 4 wire SPI) • Instrument handles and attributes. • Global DUT attributes. • This VI will load the central Regmap FGV into memory so it is available to all other modules in the project. • Functionality to synch the DUTs MMRs to the global Regmap mirror is provided. (All registers are read and their values are stored on the mirror) • Configuration of the global attributes as defined by this interface are stored in a configuration file. This .ini file is prefixed by the given computer name. In a group setup this will allow each used to configure their own preferred default settings.

  4. CODA_Register_Interface • Read • Write Coda_Register_Interface GUI • The CODA_Register_Interface GUI is the main debug interface to communicate with the DUT. At its hearth is the Regmap FGV mirror. • Provides a graphical display of all registers on the DUT. • You can search for a register, or a field in a register, by its name. • You can access documentation describing the functionality of a given register. (documentation is only as extensive as that provided by the designer when developing the CODA .xml) • You can read from or write to any register and the interface will maintain a log of this communication sequence. • A comms sequence can be saved and played back to the DUT.

  5. Read • MMRs • Write • MMRs MMR read and write framework. • When a DUT register read or a write is performed the task will be handled by the read and write framework. • The write framework will be passed the register address & register data to be written. • The read framework will be passed the register address that you want to read. • The communications protocol run by the framework is defined by the selection made in the global_attributes_configuration GUI. • Both the read and write blocks will update the RegMap FGV every time it updates (or reads from) the DUT.

  6. DUT test framework • DUT test 2 • DUT test n • DUT test 1 • Supply & • Temperature Test sequencer and DUT test framework. • Test sequencer • Test sequencer allows a number of functional DUT test VIs to be run over a user defined set of temperatures and supply conditions. • The test sequencer publishes its active temperature and supply setting to a FGV. This information is available to the DUT test framework and used when producing result files. • The DUT test framework contains functions to allow a DUT test step to create defined result files with: • Information to help trace the source of the data and to create pivot table friendly results. • Was the VI producing the results called from the sequencer. If so the results contain a pointer to the sequencer .seq and .prj files. • System the test was run on and user name of the engineer logged onto that system. • Reference of the test vi creating the results with SVN revision information. • Environmental conditions the test was run under. • Scalar data in result file is organised for use with pivot table.

  7. DUT board support DUT board support. • This module will build up over time to become a portfolio of tested support circuitry with associated software drivers. • At present there is a driver in place to build a switch matrix system using ADG2128 8*12 switch matrix ICs.

  8. END

More Related