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A Case for Thread Migration. Pınar Tözün. Data Intensive Applications and Systems École Polytechnique Fédérale de Lausanne. OLTP on a Intel Xeon5660. Shore-MT Hyper-threading disabled. better. IPC < 1 on a 4-issue machine. 70-80% of stalls are instruction stalls.
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A Case for Thread Migration Pınar Tözün Data Intensive Applications and Systems École Polytechnique Fédérale de Lausanne
OLTP on a Intel Xeon5660 Shore-MT Hyper-threading disabled better IPC < 1 on a 4-issue machine 70-80% of stalls are instruction stalls
Rethinking Thread Scheduling SLICC Traditional Threads CORES CORES Total Misses Total Misses 0 1 2 3 0 1 2 3 T1 T2 T3 T2 T2 T2 T1 T2 T1 T1 T3 T1 T2 T1 T1 T1 T3 T3 T3 T3 T1 T2 T3 1 1 L1I 2 3 time 3 6 4 9 4 10 ~70% better performance with SLICC