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Hybrid IP Lookup Architecture with Fast Update Capabilities for Enhanced Performance

This paper presents a novel hybrid IP lookup architecture designed to improve lookup performance and reduce packet drops caused by route updates in TCAM and SRAM-based engines. Our architecture utilizes an efficient trie partitioning scheme that separates the Forwarding Information Base (FIB) into two disjoint prefix sets, optimizing for speed and efficiency. The implementation achieves a remarkable throughput of 250 million lookups per second (MLPS) using a combination of TCAM and SRAM lookup engines, showcasing improved efficiency for virtual routers and an overall enhancement in network performance.

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Hybrid IP Lookup Architecture with Fast Update Capabilities for Enhanced Performance

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  1. A Hybrid IP Lookup Architecture with Fast Updates Author : LayongLuo, GaogangXie, YingkeXie, Laurent Mathy, KavéSalamatian Conference: IEEE INFOCOM, 2012 Presenter: Tung-yin Chi Date: 2015/6/17 Department of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C.

  2. Introduction • Route updates in both engines (TCAM and SRAM based) degrade lookup performance and may lead to packet drops. • In this paper, we propose a hybrid IP lookup architecture to address this challenge. • Our implementation shows a throughput of 250 million lookups per second (MLPS). National Cheng Kung University CSIE Computer & Internet Architecture Lab

  3. Introduction • The architecture is based on an efficient trie partitioning scheme that divides the Forwarding Information Base (FIB) into two prefix sets: • a large disjoint leaf prefix set mapped into an external TCAM-based lookup engine • a small overlapping prefix set mapped into an on-chip SRAM-based lookup pipeline. National Cheng Kung University CSIE Computer & Internet Architecture Lab

  4. Overall Architecture National Cheng Kung University CSIE Computer & Internet Architecture Lab

  5. Trie Partitioning Scheme National Cheng Kung University CSIE Computer & Internet Architecture Lab

  6. SRAM-based IP lookup pipeline National Cheng Kung University CSIE Computer & Internet Architecture Lab

  7. Update (insert) National Cheng Kung University CSIE Computer & Internet Architecture Lab

  8. Update (delete) National Cheng Kung University CSIE Computer & Internet Architecture Lab

  9. Lookup for virtual routers • By appending a unique virtual router ID (VID) before the prefix we get a virtual prefix. • As an example, let’s assign a VID 0 to the FIB shown in Fig. 1(a) and a VID 1 to the FIB shown in Fig. 8(a). National Cheng Kung University CSIE Computer & Internet Architecture Lab

  10. The merged disjoint prefix set National Cheng Kung University CSIE Computer & Internet Architecture Lab

  11. Analysis of Real Routing Tables National Cheng Kung University CSIE Computer & Internet Architecture Lab

  12. Throughput • PEARL hardware platform • Xilinx Virtex-5 XC5VLX110T-1 FPGA • IDT75K72100 TCAM • clock frequency 297 MHz • 297 MLPS in the SRAM-based lookup pipeline. • TCAM has a theoretical maximum throughput of 250 MLPS. National Cheng Kung University CSIE Computer & Internet Architecture Lab

  13. Throughput • However, the PEARL platform we used has only four Gigabit Ethernet interfaces that need a maximum lookup rate of about 5.95 MLPS. National Cheng Kung University CSIE Computer & Internet Architecture Lab

  14. Update Overhead National Cheng Kung University CSIE Computer & Internet Architecture Lab

  15. Update Overhead National Cheng Kung University CSIE Computer & Internet Architecture Lab

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