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Error Design and Handling in Primary Backup System Implementation

This document provides a comprehensive overview of error design and handling strategies for the implementation of the Primary Backup Pattern in systems. Key guidelines include cleaning up after exceptions, proper exception handling to avoid flow control misuse, and logging exceptions once for clarity. The Primary and Backup modes are defined with specific input and output signals for both modes. An example of error propagation is illustrated through basic transitions, alongside the modeling of errors in computer systems, including specifics on CPU and memory configurations.

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Error Design and Handling in Primary Backup System Implementation

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  1. CPSC 875 John D. McGregor C10 – Error Design

  2. Error design

  3. Exception handling • Always clean up after yourself • Never use exceptions for flow control • Do not suppress or ignore exceptions • Do not catch top-level exceptions • Log exceptions just once

  4. PrimaryBackupPattern system implementation PrimaryBackupPattern.impl subcomponents primary: system sys in modes (Primarymode); backup: system sys in modes (Backupmode); connections inprimary: data port insignal -> primary.insignalin modes (Primarymode); inbackup: data port insignal -> backup.insignal in modes (Backupmode); outprimary: data port primary.outsignal -> outsignalin modes (Primarymode); outbackup: data port backup.outsignal -> outsignalin modes (Backupmode); modes Primarymode: initial mode; Backupmode: mode; end PrimaryBackupPattern.impl;

  5. Error design error model Example1 features ErrorFree: initial error state; Failed: error state; Fail, Repair: error event; CorruptedData: out error propagation {Occurrence => fixed 0.8}; end Example1; error model implementation Example1.basic transitions ErrorFree-[Fail]->Failed; Failed-[out CorruptedData]->Failed; Failed-[Repair]->ErrorFree; properties Occurrence => poisson 1.0e-3 applies to Fault; Occurrence => poisson 1.0e-4 applies to Repair; end Example1.basic;

  6. Using error model system computer end computer; system implementation computer.personal subcomponents CPU: processor Intel.DualCore; RAM: memory SDRAM; FSB: bus FrontSideBus; annex Error_Model {** Model => My_ErrorModels::Example1.basic applies to CPU; Occurrence => fixed 0.9 applies to error CPU.CorruptedData; **}; end computer.personal;

  7. Propagation

  8. Error Propagation

  9. Propagations

  10. Full spec

  11. Next steps • Read: • http://hbswk.hbs.edu/item/5699.html At the bottom of the page there is a place to download “Full Working Paper Text” • http://www.sei.cmu.edu/reports/07tn043.pdf • Continue to expand your AADL model • Add at least one state machine • Define and bind to a platform • Identify at least one type of error and add to your model

  12. Next steps – Mar 3rd • individual • Bring EPF up to date and submit • Team • Identify at least one type of error and add to your model and submit

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