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EE 365

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EE 365

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  1. EE 365 Adders Multipliers Read-Only Memories

  2. 4-bit comparator EQ_L Equality Comparators • 1-bit comparator

  3. 8-bit Magnitude Comparator

  4. Other conditions

  5. X Y Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Adders • Basic building block is “full adder” • 1-bit-wide adder, produces sum and carry outputs • Truth table:

  6. Full-adder circuit

  7. Ripple adder • Speed limited by carry chain • Faster adders eliminate or limit carry chain • 2-level AND-OR logic ==> 2n product terms • 3 or 4 levels of logic, carry lookahead

  8. 74x2834-bit adder • Uses carry lookahead internally

  9. “generate” “half sum” carry-in from previous stage “propagate”

  10. Ripple carry between groups

  11. Lookahead carry between groups

  12. Subtraction • Subtraction is the same as addition of the two’s complement. • The two’s complement is the bit-by-bit complement plus 1. • Therefore, X – Y = X + Y + 1 . • Complement Y inputs to adder, set Cin to 1. • For a borrow, set Cin to 0.

  13. Full subtractor = full adder, almost

  14. Multipliers • 8x8 multiplier

  15. Full-adder array

  16. Faster carry chain

  17. Read-Only Memories

  18. Why “ROM”? • Program storage • Boot ROM for personal computers • Complete application storage for embedded systems. • Actually, a ROM is a combinational circuit, basically a truth-table lookup. • Can perform any combinational logic function • Address inputs = function inputs • Data outputs = function outputs

  19. Logic-in-ROM example

  20. 4x4 multiplier example

  21. Internal ROM structure PDP-11 boot ROM (64 words, 1024 diodes)

  22. Two-dimensional decoding ?

  23. Larger example, 32Kx8 ROM

  24. Today’s ROMs • 256K bytes, 1M byte, or larger • Use MOS transistors

  25. EEPROMs, Flash PROMs • Programmable and erasableusing floating-gate MOS transistors

  26. Typical commercial EEPROMs

  27. EEPROM programming • Apply a higher voltage to force bit change • E.g., VPP = 12 V • On-chip high-voltage “charge pump” in newer chips • Erase bits • Byte-byte • Entire chip (“flash”) • One block (typically 32K - 66K bytes) at a time • Programming and erasing are a lot slower than reading (milliseconds vs. 10’s of nanoseconds)

  28. Microprocessor EPROM application

  29. ROM control and I/O signals

  30. ROM timing