1 / 25

VHDL Implementation for the SRC ALU

VHDL Implementation for the SRC ALU. Edgar Arce Miguel González Miguel Padilla José F. Ocasio December 15, 2004. Introduction Overview Adder Register B interface ALU_hi Lowalu (1 bit). Lowalu(10 bits) ALU ALU_System ALU_ADC Conclusions References Acknowledgements. Outline.

meara
Télécharger la présentation

VHDL Implementation for the SRC ALU

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. VHDL Implementation for the SRC ALU Edgar Arce Miguel González Miguel Padilla José F. Ocasio December 15, 2004

  2. Introduction Overview Adder Register B interface ALU_hi Lowalu (1 bit) Lowalu(10 bits) ALU ALU_System ALU_ADC Conclusions References Acknowledgements Outline

  3. Introduction • Simple Risc Computer - architecture designed specially for educational purposes • Simple structure • 32 bit CPU • For INEL 4215 purposes, it has been simplified to 8 bits • Simplified ALU executes SRC operations for 10 bits inputs • Next - an implementation for the 10 bit SRC ALU with an additional instruction called ADC

  4. Overview General diagram of the SRC ALU

  5. ADC Sequence

  6. ADC Sequence Cont.

  7. ADC Sequence cont.

  8. ADC Sequence cont.

  9. ADC Sequence cont.

  10. ADC Sequence cont.

  11. ADC Sequence cont.

  12. ADC Sequence cont.

  13. Conclusions • Instruction C = B needs no additional circuitry to be implemented, it is made by no activating any signal. • ALU of 10bits instead of 8bits because of Program Counter. • Implemented ADDER not a ADDER_SUBSRACTOR, because an additional module is needed to implement a NOT function. • When a SHIFT function is called the ALU only shifts once because the Control Unit handles the counter of it.

  14. References • http://www.gmvhdl.com/VHDL.html • http://www.isee.zju.edu.cn/hmx/asiclab2000/lab3help/tutvhdl/tutvhdl.htm • http://www.wearcam.org/ece385/lectureflipflops/flipflops/ • Computer Systems Design and Architecture, 2/E , Heuring, V. P. y Jordan, H. F., Prentice Hall, 2004.

  15. Acknowledgements • To God. • Always helpful Google. • Buhos Society • To the Buho VHDL Sensei Marcos Mejias. • To the lobby’s benches for giving us a place to sleep. • To Chori for supplying us with healthy food at 3:00am.

More Related