Status: Process Integration, Devices and Structures (PIDS)

1. ITRS ITWG Meeting Amsterdam April 4, 2003 Status: Process Integration, Devices and Structures (PIDS) P. Zeitzoff, J. Hutchby, K. Schrueffer, T. Skotnicki, S. Sawada, T. Sugii, G. Bourianoff, K. DeMeyer

2. Focus MOSFET & other devices, including memory: performance, power dissipation, density, scaling, limitations Process integration Forward-looking directions, including for MOSFET and beyond-MOSFET Scope Logic (high-performance and low-power logic) Memory (DRAM and NVM) RF and Mixed Signal/Analog Technologies for Wireless Communications Reliability Emerging Research Devices What is PIDS?

3. All subgroups progressing toward complete re-evaluation for 2003 ITRS Some key issues Logic: complete revision of scaling scenario, based on improved device models embedded in EXCEL EOT and Vdd scaling critical to driving need for high-k gate dielectric: goal is high-k needed in 2006 or beyond DRAM Memory: scaling of DRAM half pitch, cell area design factor, storage cell dielectric EOT, etc. are critical issues for cell and chip size, bits per chip, etc. Mixed signal/analog group is now considerably enlarged and broadened to cover RF and mixed signal/analog for wireless communications PA and power management, RF transceiver, analog and mixed signal, including LNA, and millimeter wave Technologies include Si, SiGe, GaAs, GaP Devices include MOSFET, MESFET, HEMT, HBT PIDS Status