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10K 

Do you have a square waveform generator, but not a real pulse generator for testing the integrator? Here is a simple (crude) way to get the pulse you need -- about 1 millisecond long, 1-5 volts high, 50 pulses each second.

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10K 

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  1. Do you have a square waveform generator, but not a real pulse generator for testing the integrator? Here is a simple (crude) way to get the pulse you need -- about 1 millisecond long, 1-5 volts high, 50 pulses each second. It generates a more-or-less square pulse on every rising edge of the input square wave. Adjust . . . --the repetition rate by the waveform generator's frequency (50 Hz) --the width of the output pulse by the waveform generator's amplitude (low) --the amplitude of the output pulse using the 10K pot 741 op-amp 0.1 F 1N914 INTEGRATOR + - 1N914 SQUARE WAVE IN 10K pot 10K 10K input impedance Believe me when I tell you that this turkey will not be found in any book of standard circuits; it's a "make do with what you've got" sort of kludge. A TTL one-shot (e.g. 74123) is a better way to go if you've got one. A waveform generator chip is even better. The first capacitor and resistor differentiate the square wave, producing short up-going and down-going pulses. The first diode removes the down-going pulses. The op-amp, highly saturated, is usually at -15 V but rushes to +15 V when the incoming pulse shows up. The 10K pot voltage divides the output to get a reasonable (and adjustable) pulse height. The final diode keeps only the positive portion of the output pulse.

  2. Here is a better pulse generator based on the 74LS123 dual one-shot (only one one-shot is used). The input is a square wave, about 3 volts peak-to-peak, at the desired pulse repetition rate (e.g. 10-40 Hz). The outgoing pulse width is variable between about 0.1 ms and 3.5 ms, and the outgoing pulse height is variable from 0 volts to about 3 volts -- plenty of variation to give the voltage integrator a good workout. not connected 14 CEXT pulse width adjustment 0.1F 15 RCEXT +5V connected 74LS123 100K 16 VCC 10K ~3 V peak-to-peak ~40 Hz 2 13 amplitude adjustment Integrator QOUT BIN 1N914 10K 10K 1 AIN 8 GND The 74LS123 is powered by +5 volts (pin 16) and ground (pin 8). Do not connect +15 V or -15 V to this chip! Set the two pots to about midrange and the input waveform generator to low amplitude. Power up. Increase the waveform generator's amplitude until you see output pulses, but don't go beyond about 4 volts peak-to-peak on the input. Adjust the two pots to get the output pulse width and amplitude that you need to exercise the voltage integrator.

  3. The Leaky Voltage Integrator The upper trace is the incoming pulse to be integrated. Its amplitude is very small. The lower trace is the output of the integrator. You can see it growing (downward) during the input pulse, and discharging (leaking) during the long wait until the next input pulse. Two questions: 1. Is the leak so large that it has a significant impact on the accuracy of the integration? Remember that the leaking doesn't stop during the input pulse. 2. Is the integrator's capacitor adequately discharged before the next pulse arrives? VOUT

  4. OLD! Calculating the Basic Properties of the Inverting Amplifier Since no current flows in or out of the op-amp input terminals, the current I through R1 must be the same as the current through R2. I = V/R for both resistors. Hence [1] (VOUT - VIN-) / R2 = (VIN- - VSRC) / R1 Multiplying by R1R2 . . . [2] R1 (VOUT - VIN-) = R2 (VIN- - VSRC) Expanding . . . [3] R1 VOUT - R1 VIN- = R2 VIN- - R2 VSRC [4] By definition, the open-loop gain of the op-amp is GOL = -VOUT / VIN- (with VIN+ at ground) so VIN- = -VOUT / GOL . Substituting for VIN- in [3] . . . [5] R1 VOUT + R1 VOUT / GOL = -R2 VOUT / GOL - R2 VSRC Multiplying by GOL and collecting terms with VOUT . . . [6] R1 GOL VOUT+ R1 VOUT + R2 VOUT = -R2 VSRC GOL [7] VOUT = -VSRC R2 GOL / (R1 GOL + R1 + R2) which for very large GOL becomes just VOUT = -VSRC (R2 / R1). In the general case, the two equations in red, [7] then [4], will yield VOUT and VIN- given VSRC , GOL , R1 and R2 . [8] It is useful to define the actual gain of the entire circuit GCIRC = -VOUT / VSRC = R2 GOL / (R1 GOL + R1 + R2) (from [7]) Inverting . . . [9] 1 / GCIRC = (R1 GOL + R1 + R2) / R2 GOL = R1 / R2 + R1 / R2 GOL + 1 / GOL [10] We can define the ideal (very large GOL) gain of the amplifier as GIDEAL = R2/R1. Multiplying [9] by GIDEAL . . . [11] GIDEAL / GCIRC = 1 + 1 / GOL + GIDEAL / GOL = (GOL + GIDEAL + 1) / GOL . [12] GCIRC = GIDEAL GOL / (GOL + GIDEAL + 1) In words, the actual gain of the amplifier is the ideal gain R2/R1 multiplied by a correction factor that is nearly 1 for op-amps with very large open-loop gains but becomes significantly less than 1 as the op-amp gain becomes comparable to the ideal gain. Clearly you can reach the troublesome region where the correction factor is significantly less than 1 by (1) operating the op-amp in a frequency regime where its open-loop gain is low, or (2) demanding that the gain of your amplifier be very high, or (3) even worse, both.

  5. OLD! What is the effect on a feedback-controlled inverting amplifier if the op-amp does not have a very high open-loop gain? Let's consider the inverting amplifier (circuit #1). R1 -- the input resistor (e.g. 10 K) R2 -- the feedback resistor (e.g. 100 K) VSRC -- the voltage at the input to the circuit (referenced to ground) VIN- -- the voltage at the inverting input of the op-amp (referenced to ground since VIN+ is at ground) VOUT -- the voltage at the op-amp (hence circuit) output (referenced to ground) GOL -- the open-loop gain of the op-amp  -VOUT / VIN- for VIN+ at ground GCIRC -- actual circuit gain  -VOUT / VSRC for VSRC and VOUT referenced to ground Noting that no current flows in or out of the VIN- terminal, we can compute the current through R1 and R2: I = (VOUT - VSRC) / (R1 + R2) and the voltage drop across R2: (VOUT - VIN-) = I  R2. As defined above, VOUT = -GOL VIN- ; VIN- = -VOUT / GOL After a few lines of algebra : GCIRC -VOUT / VSRC = R2 / [ R1 + (R1 + R2) / GOL ] eqn. 1 For GOL very large, (R1 + R2) / GOL is very small compared to R1, so GCIRC R2 / R1 As GOL becomes smaller, the full formula must be used; the denominator increases so |GCIRC| becomes smaller. If we define the ideal gain of the amplifier to be GIDEAL = R2 / R1 and substitute this into eqn. 1, then GCIRC = GIDEAL x GOL / ( GOL + GIDEAL + 1) For high GOL, the correction factor relating the actual and ideal circuit gains is nearly one. As GOL gets lower, approaching GIDEAL, the correction factor starts falling significantly below 1, so the real circuit gain becomes less than the feedback-defined ideal gain.

  6. Minimum Circuit for Sine and Triangle Waves -- EXAR XR-2206 Waveform Generator +15 V Smooth internal bias voltage 1uF Smooth Vcc 1uF 4 10 +15 V Sine wave is centered at about this voltage, here ~7.5 volts Determines amplitude of sine wave, here ~1.6 volts peak-to-peak 0 to 50K Vcc BIAS AMSI 1 5.1K MO Frequency determined by RT and CT Offset and amplitude determined by pin-3 circuitry 3 10K 5.1K 1.0uF STO SINE or TRIANGLE WAVE OUT TC1 5 2 CT 0.1uF TC2 6 +15 V Timing capacitor CT 0.001 uF to 100 uF Pullup resistor for open collector square-wave output TR1 7 Frequency 1 / RTCT Here F = 1 / (104 10-7) = 1KHz 10K RT x TR2 10K 8 Timing resistor RT 1K to 2M SYNCO SQUARE WAVE OUT 11 Frequency determined by RT and CT Varies between ~ground and ~pullup voltage x FSKI 9 WAVEA1 13 Remove resistor for triangle wave output 200 WAVEA2 14 x SYMA1 15 x SYMA2 16 GND 12

  7. Embellished Circuit for Sine and Triangle Waves -- EXAR XR-2206 Waveform Generator +15 V Smooth internal bias voltage 1uF Smooth Vcc 1uF 4 10 +15 V Vcc BIAS Make this a 0-50K variable resistor for amplitude control Provide some adjustment for the sine wave's offset voltage. Remember that moving this away from the midpoint voltage (7.5 volts) reduces the maximum sine wave amplitude. AMSI 5.1K 1 1K MO Frequency determined by RT and CT Offset and amplitude determined by pin-3 circuitry 3 50K CT 1.0uF STO SINE or TRIANGLE WAVE OUT 5.1K TC1 5 2 TC2 6 Switch in various capacitors between 0.001 uF to 100 uF +15 V Pullup resistor for open collector square-wave output TR1 7 Frequency 1 / RTCT 1K RT x TR2 10K 8 2M Make RT continuously variable between 1K and 2M.You must not let RT fall below 1K ! ! SYNCO SQUARE WAVE OUT 11 Frequency determined by RT and CT Varies between ~ground and ~pullup voltage x FSKI 9 WAVEA1 13 Sine waveform adjustment. Open switch for triangle waves. 500 WAVEA2 14 SYMA1 25K Waveform symmetry adjustment. 15 SYMA2 16 GND 12

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