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Advanced Integer Programming for Simultaneous Scheduling and Register Allocation on C6X

Explore ILP formulation for scheduling and register allocation on C6X, leveraging CPLEX and Pegasus formats for efficient solutions. Model implications and compare algorithm performance for enhanced optimization.

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Advanced Integer Programming for Simultaneous Scheduling and Register Allocation on C6X

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  1. Integer programming approaches to simultaneous scheduling and register allocation on the C6X Andrew Gilpin, Rebecca Hutchinson April 12, 2005

  2. Project Outline • Formulate scheduling as an ILP. • Sanity check formulation using CPLEX to solve. • Translate Pegasus format to ILP; translate CPLEX solution back to Pegasus. • Formulate and incorporate register allocation into the ILP and translation.

  3. ILP Formulation(examples of basic constraints)

  4. ILP Formulation(examples of dealing with the crosspath)

  5. Modeling implications in ILP

  6. Implementation Progress • Formulation complete, implementation halfway done • Taking advantage of new technology • Latest version of CPLEX allows “warm-starts” • Allows us to use list-scheduling solution to “seed” the ILP, hopefully yielding faster solve times • Hopefully we can extend this model to include register allocation as well

  7. Proposed evaluation • Compare schedule lengths of our algorithm to schedule sizes from Leuper’s algorithm • Test data: functions in test.c • Also compare compile times • We expect to be slower, but how much? • Compare running times in simulator

  8. References • Wilken, Liu, and Heffernan. “Optimal Instruction Scheulding Using Integer Programming.” PLDI 2000. • Chang, Chen, and King. “Using Integer Linear Programming for Instruction Scheduling and Register Allocation in Multi-issue Processors.” Computers and Mathematics with Applications,Vol 34(9):1-14. • Goodwin and Wilken. “Optimal and Near-optimal Global Register Allocation Using 0-1 Integer Programming.” Software-Practice and Experience, Vol 26(8), 929-965, August 1996. • Texas Instruments: TMS320C62xx CPU and Instruction Set Reference Guide, www.ti.com/sc/c6x, 1998

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