1 / 4

Mimosa 22

Mimosa 22. Overview. Process 0.35 µm (AMS c35b4/opto) (3.3V ± 0.3V) Matrix of 575 x 136 pixels with 18.4 µm pitch 128 digital columns and 8 analog columns Raw digital output without zero suppression Main goals: Characterize the new pitch

nathan-mueller
Télécharger la présentation

Mimosa 22

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Mimosa 22

  2. Overview • Process 0.35 µm (AMS c35b4/opto) (3.3V ± 0.3V) • Matrix of 575 x 136 pixels with 18.4 µm pitch • 128 digital columns and 8 analog columns • Raw digital output without zero suppression • Main goals: • Characterize the new pitch • Make a design which is working with large matrices (2 cm x 2 cm) • Improve testability Mimosa 22 Frederic.Morel@IReS.in2p3.fr

  3. Overview • 3 main types of pixels (2 structures with reset and 1 with self-bias diode) • different size of diodes (due to the new pitch) • Radtol and non radtol diodes • See A. Dorokhov presentation • Fully controlled by JTAG for configuration and testing • Including Bias and voltage references • See Mimosa 22 User Manuel • See G. Claus presentation Mimosa 22 Frederic.Morel@IReS.in2p3.fr

  4. Functional view The Bias generator, Sequencer, Readout and JTAG controller are not represented • FRDO = 100 MHz • Discriminator frequency = 6.25 MHz • In pixel frequency = 100 MHz • Integration time = 92 µs Shift Row Reg 575bits Pixel array 575x136 Pixel sequencer + Buffer tree FRDO (16 CK) Two JTAG set test voltages emulated pixel outputs Dynamic & static 8 Analog outputs 128 Discriminators FRDO / 16 Disable discriminator Register Simple digital pattern generator for data transfer test purpose 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 81 FRDO Pads • The pixel was designed to work at 160 ns. Due to large capacitances of the output lines, 200 ns for reading one line is better. Mimosa 22 Frederic.Morel@IReS.in2p3.fr

More Related