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Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation

Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation. Presenter: Lin Huang Lin Huang and Qiang Xu CU hk RE liable computing laboratory (CURE) The Chinese University of Hong Kong. Process Variation Becomes A Serious Concern.

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Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation

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  1. Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation Presenter: Lin Huang Lin Huang and Qiang Xu CUhk REliable computing laboratory (CURE) The Chinese University of Hong Kong

  2. Process Variation Becomes A Serious Concern • The ever-increasing transistor variability • Spatial correlation characteristic

  3. P1 P2 MPSoC Task Graph Task Schedule Task Allocation and Scheduling for MPSoCs • Given • Determine • Process variation affects performance yield

  4. Limitations of Previous Work • Only a few explicitly consider process variation • All assume the task execution time follows Gaussian distribution • In reality, it can be approximated with Gaussian distribution in some instances at best [Sarangi-ieeetsm08]

  5. Limitations of Previous Work • All assume the execution times of multiple tasks are s-independent • This assumption ignores the spatial correlation characteristic of process variation

  6. Limitations of Previous Work • All assume the execution times of multiple tasks are s-independent • This assumption ignores the spatial correlation characteristic of process variation Consider a pair of MPSoCs i, j

  7. Limitations of Previous Work • With correlation, statistical properties of s-independent Gaussian distribution are not applicable

  8. Agenda • Introduction and motivation • Problem formulation • Proposed quasi-static task allocation and scheduling algorithm • Simulated annealing-based initial task scheduling • Clustering-based performance yield enhancement • Experimental results • Conclusion

  9. Initial Task Scheduling • Modified simulated annealing technique • Solution representation • (scheduling order sequence; resource binding sequence) • Example: (τ1, τ3, τ2, τ4, τ5; P1, P2, P1, P1, P2) • Performance yield estimation • Closed-form statistical analysis is extremely difficult

  10. Initial Task Scheduling • Performance yield estimation • Closed-form statistical analysis is extremely difficult • Monte Carlo simulation meet constraint (1) or not (0) schedule i.i.d. samples of MPSoC frequency map

  11. Initial Task Scheduling • Efficiency of Monte Carlo simulation min = 0 N – number of test chips M – number of chips meeting performance constraints max = 0.031 N = 1,000, confidence level = 95%

  12. Performance Yield Enhancement • With the initial task schedule, some chips might cannot meet performance constraints Residual test chips Covered by initial schedule

  13. Performance Yield Enhancement • Iteratively generate additional task schedules • k-mean clustering and objectively task schedule generation Three clusters

  14. Performance Yield Enhancement • Selection criteria generation • Multilayer perceptron • One time effort • Training sample – test chips • Inputs: frequency map • Outputs: meet constraint or not • Sigmoid function

  15. ... … 1.12 0.85 0.97 Task Schedule Selection ... … 0.02 0.96 0.87 • Given an MPSoC product • Frequency map becomes available • Forward propagation through selection criteria network • Schedule selection rule

  16. Experimental Setup • Task graphs are generated by TGFF • Task number: 31 – 152 • Hypothetical MPSoCs • Heterogeneous or homogeneous • Core number: 4 – 8 • Process variation model • Multivariate normal distribution with spatial correlation [Sarangi-ieeetsm08] • The distance pass which the correlation becomes zero = {0.1, 0.5} • The variation = 3.2%

  17. Experimental Results

  18. Experimental Results

  19. Experimental Results

  20. Experimental Results

  21. Experimental Results

  22. Experimental Results 59.3% 40.8% Sinit 36.9%

  23. Experimental Results

  24. Conclusion • We propose a novel quasi-static variation-aware task allocation and scheduling technique for MPSoC designs • Initial task scheduling • Simulated annealing • Monte Carlo simulation • Performance yield enhancement • k-mean clustering • Multilayer perceptron • Experimental results demonstrate the effectiveness

  25. Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation Thank you for your attention !

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