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Diagnostic Tests and Full-Response Fault Dictionary

Diagnostic Tests and Full-Response Fault Dictionary. Vishwani D. Agrawal ECE Dept., Auburn University Auburn, AL 36849 October 28, 2009. Mohammed Ashfaq Shukoor Vishwani D. Agrawal. A Two Phase Approach for Minimal Diagnostic Test Set Generation.

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Diagnostic Tests and Full-Response Fault Dictionary

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  1. Diagnostic Tests and Full-Response Fault Dictionary Vishwani D. Agrawal ECE Dept., Auburn University Auburn, AL 36849 October 28, 2009 VLSI Design & Test Seminar

  2. Mohammed Ashfaq Shukoor Vishwani D. Agrawal A Two Phase Approach for Minimal Diagnostic Test Set Generation Auburn University, Department of Electrical and Computer Engineering Auburn, AL 36849, USA 14th IEEE European Test Symposium Seville, Spain, May 25-28, 2009 VLSI Design & Test Seminar

  3. A Primal-Dual Solution to Minimal Test Generation Problem Mohammed Ashfaq Shukoor Vishwani D. Agrawal Auburn University, Department of Electrical and Computer Engineering Auburn, AL 36849, USA 12th IEEE VLSI Design and Test Symposium, 2008, Bangalore VLSI Design & Test Seminar

  4. Outline • Introduction • Motivation • Fault Diagnostic Table • Diagnostic ILP • Diagnostic Fault Independence • 2-phase Approach • Results • Conclusion & Future Work VLSI Design & Test Seminar 4

  5. Fault Dictionary Based Diagnosis • Fault dictionary is a database of simulated test responses for all modeled faults. • Used by some diagnosis algorithms: • It is fast • No simulation at the time of diagnosis. • Dictionary can be very large, however! • Two most popular forms of dictionaries are: • Pass-Fail Dictionary • Full-Response Dictionary VLSI Design & Test Seminar 5

  6. Pass-Fail Dictionary • For each vector store the list of all detectable faults. • Total storage requirement: F  T bits, where F is number of faults and T is number of vectors. Example: Fault Syndrome (Signature) ‘1’ → detected (fail) ‘0’ → not detected (pass) VLSI Design & Test Seminar 6

  7. Full-Response Dictionary • For each vector, store the fault detection data for all outputs. • Total storage requirement: F  T O bits, where F is number of faults, T is number of vectors and O is number of outputs. Example: 2 outputs Fault Syndrome ‘1’ → detected ‘0’ → not detected VLSI Design & Test Seminar 7

  8. Motivation for Diagnostic Test Set Minimization • The amount of data in a full-response dictionary is (FTO). • Previous work on dictionary compaction has been concentrated on managing the dictionary organization and encoding. • Data in a full-response dictionary can be optimized by minimizing the number of vectors in the diagnostic test set. VLSI Design & Test Seminar 8

  9. Fault Diagnostic Table • We compact the full-response dictionary into a diagnostic table, which contains information on detection and distinguishability of faults. Example: Consider a circuit with 2 outputs, having 8 faults that are detected and diagnosed by 5 test vectors 1 2 2 3 0 0 0 1 F1 F2 F3 F4 F5 F6 F7 F8 1 1 1 1 0 2 2 2 1 1 2 0 3 0 0 0 1 0 0 0 0 1 0 2 0 2 3 3 0 0 1 0 Fault Diagnostic Table Full-response Dictionary VLSI Design & Test Seminar 9

  10. vj Diagnostic ILP • If vj = 1, then vector j is included in the minimized vector set • If vj= 0, then vector j is not included in the minimized vector set Objective: minimize (1) coefficient aij≥ 1 only if the fault i is detected by vector j, else it is 0 Subject to constraints: (2) i = 1, 2, . . . , K (3) k = 1, 2, . . . , K-1 p = k+1, . . . , K (4) integer [0, 1], j = 1, 2, . . . , J K is the number of faults in a combinational circuit J is the number of vectors in the unoptimized vector set VLSI Design & Test Seminar 10

  11. Fault Independence Independent Faults [1]: Two faults are independent if and only if they cannot be detected by the same test vector. T(f2) T(f2) T(f1) T(f1) f1 and f2 are not independent f1 and f2 are independent Generalized Fault Independence (Vector-Specific, Multiple-Outputs): A pair of faults detectable by a vector set V is said to be independent with respect to vector set V, if there is no single vector that detects both faults and produces an identical output response. [1]S. B. Akers, C. Joseph, and B. Krishnamurthy, “On the Role of Independent Fault Sets in the Generation of Minimal Test Sets,” Proc. International Test Conf., 1987, pp. 1100–1107. VLSI Design & Test Seminar 11

  12. Example (Two-Output Circuit) (a) Fault independence Guaranteed diagnosis Fault detection Table (b) Generalized fault independence Guaranteed diagnosis Fault diagnostic Table VLSI Design & Test Seminar 12

  13. Effect of Generalized Independence Relation on the Constraint Set Sizes VLSI Design & Test Seminar 13

  14. Two-Phase Method Phase-1:Use existing ILP minimization technique to obtain a minimal detection test set from the given unoptimized test set. Find the faults not diagnosed by the minimized detection test set. Phase-2: Run the diagnostic ILP on the remaining unoptimized test set to obtain a minimal set of vectors to diagnose the undistinguished faults from Phase-1. Minimal set of diagnostic vectors from Phase-2 Complete diagnostic test set Minimal detection test set of Phase-1 VLSI Design & Test Seminar 14

  15. Comparison Between 1-Step Diagnostic ILP Run and 2-Phase Method Complete Diagnostic Test Set c432 4-b ALU c17 c880 VLSI Design & Test Seminar 15

  16. Results • SUN Fire 280R, 900 MHz Dual Core machine • ATPG – ATALANTA • Fault Simulator – HOPE • AMPL Package with CPLEX solver for formulating and solving Linear Programs VLSI Design & Test Seminar 16

  17. 2-Phase Method * M. A. Shukoor, Fault Detection and Diagnostic Test Set Minimization, Master’s thesis, Auburn University, ECE Department, May 2009. * M. A. Shukoor and V. D. Agrawal, “A Primal-Dual Solution to the Minimal Test Generation Problem,” Proc. 12th VLSI Design and Test Symp., 2008, pp. 169–179. VLSI Design & Test Seminar 17

  18. Diagnostic Characteristics of Minimized Complete Diagnostic Test Set VLSI Design & Test Seminar 18

  19. 2-Phase vs. Previous Work [1]Y. Higami and K. K. Saluja and H. Takahashi and S. Kobayashi and Y. Takamatsu, “Compaction of Pass/Fail-based Diagnostic Test Vectors for Combinational and Sequential Circuits,” Proc. ASPDAC, 2006, pp. 75-80. VLSI Design & Test Seminar 19

  20. Conclusion • Minimization of a diagnostic test set is carried out without loss of diagnostic resolution of a full-response dictionary. • We have formulated the diagnostic ILP which is an exact method to minimize a diagnostic test set. • The newly defined generalized independence relation between pairs of faults reduces the number of fault-pairs that needs to be distinguished. • The two-phase approach has polynomial time complexity (in empirical sense) and is effective in producing compact diagnostic test sets. • New problems to be solved: • Define a diagnostic coverage metric similar to the stuck-at detection coverage. • Develop ATPG algorithms to find a distinguishing test for a pair of faults. VLSI Design & Test Seminar 20

  21. Thank you … VLSI Design & Test Seminar 21

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