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EECS 373 Review

EECS 373 Review. Announcements. Exam is Thursday in class. We have two rooms, but will mostly be using this one. Everyone should come here. Exam is open book and open notes Starts at 1:40, ends at 3:00. Prelab 6 had a typo. Prelab was supposed to be due this week.

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EECS 373 Review

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  1. EECS 373 Review

  2. Announcements • Exam is Thursday in class. • We have two rooms, but will mostly be using this one. Everyone should come here. • Exam is open book and open notes • Starts at 1:40, ends at 3:00. • Prelab 6 had a typo. • Prelab was supposed to be due this week. • We will take it next week (but bad idea. Lab 6 is hard!)

  3. Coverage • What have we covered in class? • PPC assembly • Bus stuff • Asynchronous bus • PPC bus • Bus interfacing • Digital design/serial communications • Memory • Stacks/Procedures/EABI • Interrupts and DMA

  4. Coverage (2/2) • What have we covered in lab? • PPC assembly • Bus interfacing/PPC bus (lab 3) • Memories • ABI and function calls • Starting interrupts

  5. PowerPC assembly • Should be able to use the white book to figure out what instructions do • Should be able to write code to solve tasks • Should know how some instructions work and be able to figure out what happens when code executes. • lda, condition codes, link register, count register, etc.

  6. Bus stuff • We covered a generic asynchronous bus • Then discussed how to interface hardware to the bus • The PPC bus • In lecture and class you learned how to interface to it, what TA, TS, TSIZE, etc. all did. • You can pretty much expect some type of bus interface question on the exam.

  7. Digital design & Serial (1/2) • We used serial interfacing to illustrate digital design • Ideas on design: • Break problems down into parts • Try for “formal” attacks on problems rather than ad hoc. • Consider a state machine as the first solution • K-maps aren’t evil per se. 

  8. Digital Design & Serial (2/2) • Ideas on serial communication • Can send data as: • 1 wire • (PWM) • Self-clocked with bit-stuffing. • Wire and clock • 2 wires (self clocked, no bit stuffing)

  9. Memory • RAM, ROM etc. • Volatile, Dynamic, Random Access • How memory works • Big box surrounded by muxes and decoders. • Reading out lines • Design with memory • How to combine memories (e.g. lab 4) • Size issues, alignment, etc.

  10. Stacks/Procedures/EABI • Why we have an ABI • How the PPC ABI works • volatile /non-volatile variables • Stack construction

  11. Interrupts and DMA • Why we use interrupts • Sync. Vs. Async. • PPC interrupts • Software viewpoint • How address is computed • How to write ISR • SRR0, SRR1 • Hardware viewpoint • SIPEND, SIVEC, SIMASK, SIEL • Interrupt lines

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