instruction selection presented by huang kuo an lu kuo chang subproject 3 n.
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Instruction Selection Presented by Huang Kuo-An, Lu Kuo-Chang Subproject 3

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Instruction Selection Presented by Huang Kuo-An, Lu Kuo-Chang Subproject 3

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  1. Instruction Selection Presented byHuang Kuo-An, Lu Kuo-ChangSubproject 3 A. Aho, M. Lam, R. Sethi, J. Ullman, “Instruction Selection by Tree Rewriting.” Compilers: Principles, Techniques & Tools”, 2nd edition, Pearson Education, Inc, 2007. pp 558-563. “The LLVM Target-Independent Code Generator: Instruction Selection.” http://llvm.org/docs/CodeGenerator.html#instselect

  2. Outline • Introducing LLVM • Instruction Selection • Tree Rewriting • Why we use LLVM? • Progress

  3. Introducing LLVM • The LLVM compiler infrastructure • Provides modular & reusable components. • Reduces the time & cost to build a particular compiler. • Those components shared across different compiles.

  4. The Steps of the LLVM Compiler C Language Front-end LLVM IR C++

  5. The Steps of the LLVM Compiler C Language Front-end LLVM IR C++ either one

  6. The Steps of the LLVM Compiler C Language Front-end LLVM IR C++ An intermediate representation: Lower than the high level language (simple instructions, no for loops, etc) Higher than the machine code (no opcodes, no registers, etc)

  7. The Steps of the LLVM Compiler C Language Front-end LLVM IR C++ source language independent An intermediate representation: Lower than the high level language (simple instructions, no for loops, etc) Higher than the machine code (no opcodes, no registers, etc) target processor independent

  8. The Steps of the LLVM Compiler C Language Front-end Mid-level Optimizer LLVM IR LLVM IR C++

  9. The Steps of the LLVM Compiler C .s file Language Front-end Mid-level Optimizer Code Generation LLVM IR LLVM IR C++ executable

  10. The Steps of the LLVM Compiler C .s file Language Front-end Mid-level Optimizer Code Generation LLVM IR LLVM IR C++ executable Instruction Selection Scheduling Register Allocation Machine-specificOptimizations Code Emission Target Machine Instructions LLVM IR

  11. Instruction Selection How does the com-piler translate a C instruction like this: Into machine code like this: LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 a[i] = b+1

  12. Instruction Selection How does the com-piler translate a C instruction like this: Into machine code like this: LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 a[i] = b+1 First Answer: break it into two steps

  13. Instruction Selection How does the com-piler translate a C instruction like this: Into machine code like this: The intermediate representation (IR): = LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 ind + + Mb C1 a[i] = b+1 + ind Ca Rsp + Ci Rsp First Answer: break it into two steps

  14. Instruction Selection Into machine code like this: The intermediate representation (IR): = LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 ind + + Mb C1 + ind Ca Rsp + Ci Rsp

  15. Instruction Selection Into machine code like this: The intermediate representation (IR): = LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 ind + + Mb C1 + ind Ca Rsp + Ci Rsp New question: How to go from IR to machine code?

  16. Instruction Selection Into machine code like this: The intermediate representation (IR): = LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 ind + + Mb C1 + ind Ca Rsp + Ci Rsp One answer: use tree rewriting

  17. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + Ca Rsp + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  18. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + Ca Rsp + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  19. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + Ca Rsp + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  20. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + R0 Rsp + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  21. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + R0 Rsp LD R0, #a + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  22. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + R0 Rsp LD R0, #a + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  23. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind + + R0 Rsp LD R0, #a + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  24. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind R0 + LD R0, #a + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  25. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind R0 + LD R0, #a ADD R0, R0, SP + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  26. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind R0 + LD R0, #a ADD R0, R0, SP + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  27. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind R0 + LD R0, #a ADD R0, R0, SP + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  28. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 + Ri ind ind R0 + LD R0, #a ADD R0, R0, SP + Ca Rj Ci Rsp add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  29. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  30. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  31. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  32. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Mb C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  33. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R1 C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  34. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R1 C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  35. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R1 C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  36. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind + add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R1 C1 R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  37. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind R1 add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  38. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind R1 add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  39. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind R1 add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  40. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + = Ca Rj ind R1 add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} R0 Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  41. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} M ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  42. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} M ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  43. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} Tree Rewriting st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + LD R0, #a ADD R0, R0, SP ADD R0, R0, i(SP) LD R1, b INC R1 ST *R0, R1 Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  44. ld Ri, #a Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} But actually, something is missing… st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri The IR immediate value, #a, does not have a size limit, but the actual machine has a limited number of bits for the immediate value (let’s say, 16 bits) add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  45. ld Ri, #a(a≤FFFF) Ri Ca {LD Ri, #a} ld Ri, x Ri Mx {LD Ri, x} But actually, something is missing… st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj Ri So we ought to state that this tree rewriting rule only applies when the immediate value can be expressed in 16 bits (ie, a≤FFFF) add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  46. ld Ri, #a(a≤FFFF) Ri Ca {LD Ri, #a} But actually, something is missing… ld Ri, x Ri Mx {LD Ri, x} st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj But what about if a cannot be expressed in 16 bits ? Then we need a new rule: Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  47. ld Ri, #a (a≤FFFF) Ri Ca {LD Ri, #a} But actually, something is missing… ld Ri, x Ri Mx {LD Ri, x} st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj But what about if a cannot be expressed in 16 bits ? Then we need a new rule: Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  48. ld Ri, #a (a≤FFFF) Ri Ca {LD Ri, #a} ld Ri, #a (a>FFFF) But actually, something is missing… ld Ri, x Ri Mx {LD Ri, x} st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj But what about if a cannot be expressed in 16 bits ? Then we need a new rule: Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  49. ld Ri, #a (a≤FFFF) Ri Ca {LD Ri, #a} ld Ri, #a (a>FFFF) But actually, something is missing… ld Ri, x Ri Mx {LD Ri, x} st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj The problem is the target processor does not have an instruction for 32-bit immediates. Instead, a set of machine instructions is needed. We call this set a pattern. Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1

  50. ld Ri, #a (a≤FFFF) Ri Ca {LD Ri, #a} ld Ri, #a (a>FFFF) Ca Ri {LD Ri, low16(#a) LD Rj, high16(#a) SHR Rj, Rj, #16 ADD Ri, Ri, Rj} But actually, something is missing… ld Ri, x Ri Mx {LD Ri, x} st x, Ri M = {ST x, Ri} Mx Ri st *Ri, Rj M = {ST *Ri, Rj} ind Rj The problem is the target processor does not have an instruction for 32-bit immediates. Instead, a set of machine instructions is needed. We call this set a pattern. Ri add Rx, Rj, #a ld Ri, Rx ind Ri {LD Ri, a(Rj)} + Ca Rj add Rx, Rj, #a add Ri, Ri, Rx + Ri {ADD Ri, Ri, a(Rj)} Ri ind + Ca Rj add Ri, Ri, Rj Ri + {ADD Ri, Ri, Rj} Ri Rj Ri + {INC Ri} add Ri, Ri, #1 Ri C1