1 / 14

ECE 352 Digital System Fundamentals

Learn how to optimize the slow part of carry look-ahead adders by separating carry and sum logic, using partial full adders, and modifying the carry-chain logic. See how carry look-ahead logic reduces area and increases speed compared to ripple-carry adders.

pweber
Télécharger la présentation

ECE 352 Digital System Fundamentals

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. ECE 352Digital System Fundamentals Carry Look-Ahead Adders

  2. Optimize The Slow Part: Carry Chain • For big adders, the carry chain is very long… • Separate the carry and sum logic in a full adder so that we can optimize the carry logic • Partial Full Adder (PFA): a full adder without carry logic • Modify the carry-chain logic to be a 2-level function instead of a multi-level function Carry Chain PFA

  3. Carry Look-Ahead Adder (CLA) • As usual, can trade area/power for speed • Multi-level logic (ripple carry) reduces area • Flattening carry logic increases speed • Make carry logic a 2-level function of: • Generate (G) • “Based on the operand values at just this bit position, will the carry-out for this position be 1 regardless of the carry-in?” • Propagate (P) • “Based on the operand values at just this bit position, will the carry-out for this position be equal to the carry-in?”

  4. Ripple-Carry Adder • Each carry bit is a multi-level function of the generates and propagates of the lower positions Ripple-carryadder C3 equation C3 = G2 + P2 C2 = G2 + P2 (G1 + P1 C1) = G2 + P2 (G1 + P1 (G0 + P0 C0))

  5. Carry Look-Ahead Adder • Each carry bit is a two-level function of the generates and propagates of the lower positions

  6. Getting There Algebraically • “Flatten” the ripple-carry equation to two levels C3 = G2+ P2 (G1 + P1 (G0 + P0 C0)) = G2 + P2G1+ P2P1 (G0 + P0 C0) = G2 + P2 G1 + P2 P1G0+ P2 P1P0C0 Carry look-ahead adder C3 equation

  7. Carry Look-Ahead Logic • You do not need to memorizethe function for each carry bit! • Instead, remember whatgenerate and propagatemean, and how MATH works C3 C0 A3 A2 A1 A0 + B3 B2 B1 B0 P2 P2 G2 + G1 P2 C3 = P1 P0 + C0 P1 + G0 bit 2 generates a carry, C3 will be 1 if and it propagates at bit 2, or if bit 1 generates a carry or if bit 0 generates a carry and bit 2, and it propagates at bit 1 or if the carry-in at the least-significant bit is 1 and bit 1 and it propagates at bit 0 and bit 2.

  8. Extending Carry Look-Ahead • Higher carry indices require more AND gates and a bigger OR gate • There is a practical limit on the size of gates… • How can we make wider adders? Hierarchy! • Add look-ahead outputs indicating if the 4-bit group of PFAs generate or propagate a carry to the next group • A higher-level look-ahead block uses group generates and propagates to determine carry-ins for each group • Same idea as before, but for a group of bits • “Does this GROUP generate a carry?” • “Does this GROUP propagate a carry?”

  9. Extending Carry Look-Ahead • Replace C4 output with a group generate output GG, and a group propagate output PG GG is 1 if the group will generate a carry PG is 1 if the group will propagate the carry

  10. 16-Bit Carry Look-Ahead Adder • Entire 4-bit carry look-ahead adders (instead of PFAs) are connected to a top-level look-ahead • Top-level look-ahead produces carry-in bits for each 4-bit CLA block based on group generates and propagates of the lower CLA blocks 4-bit look-ahead block 4-bit carry look-ahead adders

  11. 16-Bit Carry Look-Ahead Adder • Entire 4-bit carry look-ahead adders (instead of PFAs) are connected to a top-level look-ahead • Top-level look-ahead produces carry-in bits for each 4-bit CLA block based on group generates and propagates of the lower CLA blocks 4-bit look-ahead block C4 = GG0 + PG0C0

  12. 16-Bit Carry Look-Ahead Adder • Entire 4-bit carry look-ahead adders (instead of PFAs) are connected to a top-level look-ahead • Top-level look-ahead produces carry-in bits for each 4-bit CLA block based on group generates and propagates of the lower CLA blocks 4-bit look-ahead block C12 = GG2 + PG2GG1 + PG2PG1GG0 + PG2PG1PG0C0

  13. Extending Further… • We can make even larger carry look-ahead adders by adding more levels of hierarchy • Build a 64-bit CLA with four 16-bit CLAs plus another look-ahead block • Each 16-bit CLA would need a group generate and a group propagate output in its top-level look-ahead • Does this group of 16 bits generate a carry? • Does this group of 16 bits propagate a carry? • Hierarchical CLA carry chain is no longer two-level • But far fewer levels than if it were a ripple-carry adder! • CLA delay grows more slowly with operand size

  14. ECE 352Digital System Fundamentals Carry Look-Ahead Adders

More Related