'Cray xd1' diaporamas de présentation

Achieving Usability and Efficiency in Large-Scale Parallel Computing Systems

Achieving Usability and Efficiency in Large-Scale Parallel Computing Systems. Kei Davis and Fabrizio Petrini {kei,fabrizio}@lanl.gov Performance and Architectures Lab (PAL), CCS-3. Overview.

974 views • 85 slides

STATE OF THE ART

STATE OF THE ART. Section 2. Overview We are going to briefly describe some state-of-the-art supercomputers The goal is to evaluate the degree of integration of the three main components, processing nodes, interconnection network and system software

642 views • 42 slides

A Grand Challenge for the Information Age

A Grand Challenge for the Information Age. Dr. Francine Berman Director, San Diego Supercomputer Center Professor and High Performance Computing Endowed Chair, UC San Diego. The Fundamental Driver of the Information Age is Digital Data. Education. Entertainment. Shopping. Health.

504 views • 39 slides

Nicholas Moore, Miriam Leeser

Nicholas Moore, Miriam Leeser Department of Electrical and Computer Engineering Northeastern University, Boston MA Laurie Smith King Department of Mathematics and Computer Science College of the Holy Cross, Worcester MA.

509 views • 38 slides

Reconfigurable Computing Aspects of the Cray XD1 Sandia National Laboratories / California

Reconfigurable Computing Aspects of the Cray XD1 Sandia National Laboratories / California. Craig Ulmer cdulmer@sandia.gov. Cray User Group (CUG 2005) May 16, 2005. Craig Ulmer, Ryan Hilles, and David Thompson SNL/CA Keith Underwood and K. Scott Hemmert SNL/NM.

381 views • 24 slides

Reconfigurable Computing: A First Look at the Cray-XD1

Reconfigurable Computing: A First Look at the Cray-XD1. Craig Ulmer. Mitch Sukalski, David Thompson, Rob Armstrong, Curtis Janssen, and Matt Leininger Orgs: 8961 & 8963. September 1, 2004. Outline. Reconfigurable computing refresher Progress update Cray XD1 Architecture

299 views • 18 slides

1.08k views • 12 slides

Reconfigurable HPC Research at ORNL using Field-Programmable Gate Arrays (FPGAs)

Reconfigurable HPC Research at ORNL using Field-Programmable Gate Arrays (FPGAs). Olaf O. Storaasli Future Technologies Group Computer Science and Mathematics. THE SUPERCOMPUTER COMPANY. Explore FPGAs for future ORNL HPC. High-performance computing vendors adopting FPGAs.

243 views • 11 slides