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The FVTX detector in PHENIX

The FVTX detector in PHENIX

The FVTX detector in PHENIX. Forward Silicon Vertex Detector, one of a number of detector upgrades. Hubert van Hecke, Los Alamos National Laboratory for the PHENIX collaboration. Vtx (Mannel) Fvtx (HvH) RPC (Wei) TOF (Belmont) RPC gas (Wood) RPC (Kim) RPC (Meredith) Computing (Love).

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354 views • 23 slides
INFN and Università Bari , Comenius University Bratislava, INFN and

INFN and Università Bari , Comenius University Bratislava, INFN and

The Silicon Pixel Detector (SPD) for the ALICE Experiment V. Manzari/INFN Bari, Italy for the SPD Project in the ALICE Experiment. INFN and Università Bari , Comenius University Bratislava, INFN and Università Catania, CERN Geneva, Institute of Experimental Physics

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372 views • 22 slides
Building Pixel Detector Modules in Multi Chip Module Deposited Technology

Building Pixel Detector Modules in Multi Chip Module Deposited Technology

Building Pixel Detector Modules in Multi Chip Module Deposited Technology. IEEE Nuclear Science Symposium Roma Oct.2004. Originally…. …this talk should have been given by my colleague Christian Grah. Here you can see, how he looks like, at least.

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346 views • 21 slides
IST Status

IST Status

IST Status. Gerrit van Nieuwenhuizen IST-MIT meeting BNL, July 24, 2008. 1. IST FY08 R&D Prototyping. APV25-S1. Carbon-Carbon. CF Ladder. FY08 IST prototype module. PHOBOS IV sensors. PrePrototype. Kapton hybrid-cable. 2. Gerrit van Nieuwenhuizen. IST FY08 prototype top view. 3.

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312 views • 18 slides
Dicing of APV Readout Chips for FGT & IST

Dicing of APV Readout Chips for FGT & IST

Dicing of APV Readout Chips for FGT & IST. Gerrit van Nieuwenhuizen FGT meeting BNL, February 27, 2009. Number of chips needed. FGT: 600 chips (50% spares, 40% cont.) IST: 1800 chips (10% spares, 40% cont.) 2400 APV25-S1 chips to procure. 2. Gerrit van Nieuwenhuizen. February 27, 2009.

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219 views • 11 slides
Foundry Characteristics

Foundry Characteristics

Foundry Characteristics. Foundry Characteristics. AMS H35 Minimal gate length 350nm Number of metals: 4 Supply voltage 3.3V Floating gate structure – isolated NMOS and PMOS within HV deep-n-well Standard substrate resistivity 20 Ω cm Higher resistivity on request possible

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417 views • 10 slides

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