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SEU Mitigation Tests in Xilinx Virtex-6 for New CSC Electronics

SEU Mitigation Tests in Xilinx Virtex-6 for New CSC Electronics. Jason Gilmore Texas A&M University. FNAL, 6 Dec 2012. TMB Mezzanine as a Test Bed. Virtex - 6 FPGA + PROMs. QPLL. Finisar Fiber Transceiver - only for testing. Snap12 Fiber Transmitter - only for testing.

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SEU Mitigation Tests in Xilinx Virtex-6 for New CSC Electronics