'Si1 si2' diaporamas de présentation

The Design for Test Architecture in Digital Section of the ATLAS FE-I4 Chip

The Design for Test Architecture in Digital Section of the ATLAS FE-I4 Chip. Vladimir Zivkovic National Institute for Subatomic Physics (NIKHEF) Amsterdam, t he Netherlands. Topical Workshop on Electronics for Particle Physics (TWEPP) 2010 Aachen, September 22. Outline. Introduction

360 views • 24 slides

Xinyan Pan 11/22/2004

Game-Theoretic Models for Reliable Path-Length and Energy-Constrained Routing With Data Aggregation -Rajgopal Kannan and S. Sitharama Iyengar. Xinyan Pan 11/22/2004. Main Issues in Sensor Network. Energy-efficiency Reliability of a data transfer path

259 views • 17 slides

214 views • 11 slides