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The I2C (Inter-Integrated Circuit) Bus Protocol is a crucial communication interface in embedded systems, allowing devices to communicate with a master-slave architecture. This document covers the I2C master and slave interfaces, detailing key bus events such as Start, Stop, byte transmission, and acknowledgment. Additionally, it addresses scenarios like No Acknowledge, which may indicate issues such as a missing slave device or synchronization errors. The I2C bus operates at speeds between 100kHz and 400kHz, initially supporting 5V but allowing configurations down to 2V with newer specifications.
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I2C Bus Inter-Integrated Circuit Bus
I2C Bus Events: No Acknowledge (from slave to master) This means that either : • The slave is not there (in case of an address) • The slave missed a pulse and got out of sync with the SCL line of the master. • The bus is "stuck". One of the lines could be held low permanently
ข้อกำหนดเบื้องต้น BUS Speed • 100kHz – 400kHz Voltage Level • In the beginning the I2C bus focussed on 5 volt logic. • With the I2C specification 2.0 released 1998 the possible I2C reference voltage was decreased to 2 volt.