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Advanced Testing of SEU Effects in Electronic Chips

This study examines SEU effects in electronic chips through comprehensive testing setups and measurements, comparing results from different prototypes and test setups. Significant findings are detailed for analysis and comparison.

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Advanced Testing of SEU Effects in Electronic Chips

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  1. Introduction • Restarts test on PS en Avril 2009 • Mesure PS SEU chip SEU-IBM-2008 40 Mhz avec FPGA • Mesure PS SEU chip SEU-IBM-2009 ???? • Mesure PS SEU FE-I4-Proto • Mesure analogique FE-I4-Proto au CERN janvier-avril(comparaison avec LBNL) • Mesure analogique FE-C4-Proto au CPPM • Mesures PS analogue FE-C4-Proto apres irradiations • Mesures PS SEU FE-C4-Proto 06.01.2009 A.Rozanov

  2. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

  3. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

  4. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

  5. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

  6. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

  7. Details • Test set-up de Bonn – must • Test set-up de LBNL – optionel 06.01.2009 A.Rozanov

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