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This entry explores the innovative approach of hardware-software co-design to overcome the challenges of post-Moore computing. It reflects on the development of Jagus PMTest, the evolution of debugging tools for persistent memory applications, and the significance of specialized cores in future architectural designs. The insights include the principles of deterministic operations, data consistency, and the necessity of a robust software stack. Additionally, it addresses common myths in hardware design, emphasizing the importance of flexibility and collaboration between hardware and software for optimal performance and usability.
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Rethinking Boundaries through Hardware-Software Co-design for Productive Post-Moore Computing Samira Khan
My Background XFTest Debugging and testing tools for persistent memory applications 2010-2015 2015-now Software directed pre-execution for persistent memory My core is in architecture Janus PMTest Main Memory System DRAM, NVM Persistent Memory Processing-in-Memory Profiling tool for PIM applications PIMProfiler
My Background XFTest Debugging and testing tools for persistent memory applications 2010-2015 2015-now Software directed pre-execution for persistent memory My core is in architecture Janus PMTest Main Memory System DRAM, NVM Persistent Memory Processing-in-Memory Profiling tool for PIM applications PIMProfiler I design better software because I know how hardware works
Looking Backward: Lessons From Past Hardware Transactional Memory Intel iAPX 432 Has captivated architects for more than 20 years My favorite coolest chip design • MYTH: Cool hardware design is enough, everything will follow • REALITY: Has to be ultra fast to justify new programming models (5X-10X) • MYTH: Programmers want transparent hardware support • REALITY: What programmers really want • Freedom and flexibility • Deterministic operations • Debugging support
Systems In The Future Architects’ Bubble SPECIALIZED CORES CPU Ld/St MEMORY PERSISTENT MEM MEMORY WITH LOGIC DRAM BILLIONS OF EDGE DEVICES FILE I/O STORAGE SMART SSD SMART NIC
Systems In The Future PROBLEM SPECIALIZED CORES APPLICATION Which functions to offload? Software OS What is the interface? RUNTIME PERSISTENT MEM MEMORY WITH LOGIC Who provides data consistency? ARCHITECTURE Hardware How to map and schedule data? CIRCUITS How to enable computation? SMART SSD SMART NIC BILLIONS OF EDGE DEVICES Need to build the proper software stack
Systems In The Future • MYTH: Cool hardware design is enough, everything will follow • REALITY: Has to be ultra fast to justify a new programming model (5X-10X) • MYTH: Programmers want transparent hardware support • REALITY: What programmers really want • Freedom and flexibility • Deterministic operations • Debugging support PROBLEM APPLICATION Which functions to offload? Software OS What is the interface? RUNTIME Who provides data consistency? ARCHITECTURE Hardware How to map and schedule data? CIRCUITS How to enable computation? Absolutely no way to make it programmable and easy to use without software-hardware collaborative design
Rethinking Boundaries through Hardware-Software Co-design for Productive Post-Moore Computing Samira Khan