ADF4350 Testing and verification Final Report

1. ADF4350 Testing and verificationFinal Report By: Mironov Artiom Instructor: Yossi Hipsh

2. Work Goals • Understanding of the main operating principles of ADF4350 device. • Testing and verification of ADF4350 device, using provided evaluation board.

3. Overview • ADF4350 device is an electronic synthesizer, working in a wide frequency range. • The synthesizer has an integrated VCO, with fundamental frequency output ranging from 2200 MHz to 4400 MHz. • Additional divide circuits at output allow the user to get frequencies as low as 137.5 MHz. • For complete performance this device requires external loop filter and external reference frequency.

4. Overview • In simplified scheme the synthesizer can be shown as: • In next section operating principles of main blocks and their role in forming the output signal will be covered.

5. Reference Input Section • As it was mentioned before ADF4350 device uses external reference signal with frequency in range of 10-105 MHz. • This signal then passes through several special blocks: • Resulting in the output of the following frequency: • Where D is a doubler bit (0 or 1), T is a divider bit (0 or 1) and R is a counter value (1 to 1023)

6. RF N Divider • This part of ADF4350 enables phase-frequency detection and comparison between the VCO high frequency signal and a low frequency reference signal. • Basically the input is a signal generated by VCO and the output is signal, which is divided to the REF frequency: • It allows a division ratio in the PLL feedback path. The division ratio is determined by INT, FRAC and MOD values, which build up this divider.

7. PFD • Phase & Frequency Detector takes inputs from the Reference Input Section and RF N divider and produces an output proportional to the phase and frequency difference between them. • Electrical scheme:

8. PFD • This implementation of a PFD, basically consists of two D-type flip flops. One Q output enables a positive current source and the other Q output enables a negative current source. • The D-type flip flop is positive-edge triggered so the states are these (Q1, Q2): • 11 — both outputs high, OUT is disabled by the AND gate. • 00 — OUT is in a high impedance state. • 10 — P1 is turned on, N1 is turned off, and the output is at V+. • 01 — P1 is turned off, N1 is turned on, and the output is at V–.

9. PFD • Consider now how the circuit behaves if the system is out of lock and the frequency at +IN is much higher than the frequency at –IN, as shown in the next figure: • The first rising edge on +IN sends the output high and this is maintained until the first rising edge occurs on –IN. As a result the output spends most of its time in the high state.

10. Charge Pump • The signal from the PFD is an input to a charge pump. The difference in phase of the two signals is now has to be presented as a function of voltage variation, in order to drive the VCO properly. • The PFD output shows the phase difference as a function of length of positive and negative pulses. So, basically charge pump is a capacitor – longer positive pulse results in higher voltage at VCO and longer negative pulse drives the voltage down.

11. VCO • Basic frequency output from 2200 MHz to 4400 MHz. • Wideband is a result of 3 independent VCO’s. • Vtune – output of the charge pump after basic low pass external loop filter.

12. Output Stage • The RFouta+ and RFouta− pins of the ADF4350 are connected to the collectors of an NPN differential pair driven by buffered outputs of the VCO, as shown in Figure: • An auxiliary output stage exists on Pins RFoutb+ and RFoutb− providing a second set of differential outputs which can be used to drive another circuit, or which can be powered down if unused.

13. Verification Setup • The configuration for a device verification: • Attenuators of 10 db were connected at every output for protection of the scope. • The relevant output was connected to Agilent oscilloscope. • Evaluation board was connected to a PC through USB port.

14. Time Measurements • Signal’s properties in time domain were measured. • Rise time, output power and general form of the signal were examined. • Measured signal at 1000 MHz , as an example:

15. Time Measurements • A collection of such measurements were made in a frequency step of 100-500 MHz from the lowest possible frequency of 200 MHz to the highest possible of 4400 MHz. • Several conclusions were made regarding those measurements: 1. As the frequency of an output signal gets closer to a basic VCO harmonies (2200MHz- 4400MHz) the signal becomes more smooth and has more sinusoidal form.

16. Time Measurements 2. Signal’s rise time becomes smaller as the frequency grows. Approximate behavior:

17. Time Measurements 3. Signal’s output power becomes smaller as the frequency grows. Approximate behavior:

18. Frequency Measurements • To examine signal’s behavior in frequency domain FFT was implemented on a collection of samples of the same signal. • Measured signal at 1000 MHz , as an example:

19. Frequency Measurements • As well as in the time domain several measurements were made In frequency domain, obtaining signal’s spectrum in the same 200-4400MHz range. • In confirmation of the previous conclusion it was noticed that signals below basic VCO output frequency of 2200 MHz have a lot of secondary high harmonies. • Signals at frequency range of 2200-4400MHz have one dominant harmony at the output frequency and very low secondary harmonies.

20. JITTER Testing • Two kinds of JITTER tests were made: • Time JITTER – displacement of the signal at the time. • Frequency JITTER – displacement of the frequency from basic harmony. • Both tests accumulated large amount of measurements and the result was presented as zero centered histogram. • The relevant time for signals collection is about 5 minutes, estimating in thousands of samples.

21. JITTER Testing • Measurements for 1000MHz output signal: • Time JITTER: Frequency JITTER:

22. JITTER Testing • The measurements of signals in several frequencies: • For frequency JITTER: • For time JITTER:

23. Auxiliary Output Test • ADF4530 has an auxiliary output, which can be used at the same time with the primary output. • The frequency can be the same at both outputs or it can be configured that the auxiliary output will be at the basic VCO harmony while the primary output will be at the divided one. • Both configurations were tested and both were found working according to the manufacturer specifications.

24. Auxiliary Output Test • Primary and auxiliary at the same frequency of 3000 MHz: • Primary at 1000 MHz (divided output), auxiliary at 4000 MHz:

25. Summary • Specifications of ADF4350 device were found suitable to those, provided by a manufacturer in most cases. • However ADF4350 won’t be a good choice for a signal source at frequencies of 200MHz to 500MHz, because of it’s distorted general form. • Tests showed that ADF4350 has a stable signal and JITTER varies within the values, specified by a manufacturer as normal.