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TRD Electronics Flight Production

TRD Electronics Flight Production. Wim de Boer , Kai Gassmann, Florian Hauler, Andreas Sabellek , Mike Schmanau IEKP - Universität Karlsruhe (TH). Outline. TRD Electronics Overview Status of FM/FS TRD Electronics production at CSIST Results of Board-level acceptance testing Dec 06

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TRD Electronics Flight Production

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  1. TRD ElectronicsFlight Production Wim de Boer, Kai Gassmann, Florian Hauler, Andreas Sabellek, Mike Schmanau IEKP - Universität Karlsruhe (TH)

  2. Outline • TRD Electronics Overview • Status of FM/FS TRD Electronics production at CSIST • Results of Board-level acceptance testing Dec 06 • Report on replacement procedure of Actel FPGAs • Updated Time Schedule for FM U-Crates assembly and testing TIM Jan07, JSC

  3. TRD(U)-Electronics Overview V2 V2 UPSFE = TRD power supply for front end UDR = TRD data reduction board JINF = data concentrator and link to higher DAQ UHVG = TRD high voltage generator UFE = TRD front end UTE = TRD tube end UHVD = TRD high voltage distributor U = Uebergangsstrahlung UCrate = TRD electronics crate UBP = TRD backplane UPD = TRD power distribution box TIM Jan07, JSC

  4. QM2 UPD and U-Crate • One set of fully qualified QM2 TRD Electronics Crates (two set of FM Crates needed for complete TRD readout) Slow control connection to U-Crate Power supply connectors for U-Crate and 28V 6 UHVG JINF 3 UPSFE 6 UDR2 TIM Jan07, JSC

  5. Status of FM/FS Production at CSIST, Taiwan • DCDC Converter (S9056,S9048,S9053): FM/FS board production and test completed (May.06, presented on TIM Jul.06) • S9011AU Controller: FM/FS board production and acceptance test completed (Dec.06) • UBP: FM/FS production finished; Board assembly ongoing • UDR2: FM/FS board production and acceptance test completed (Sep/Dec.06, presented on TIM Oct.06) • UPSFE: FM/FS board production and acceptance test completed for 7/9 boards (Dec.06) • UHVG: reworked by VK; FM/FS production in progress, PCA delayed by components found out of specification (MIT) • JINF: FM/FS production ongoing (MIT) U Power Distribution (UPD): U DAQ Electronics (U-Crate): TIM Jan07, JSC

  6. S9011AU Controller FM/FS Test • Number of Boards tested: 4 (2 needed as FM) • Testprocedure (before/after Coating and ESS): • - Functional test via Lecroy communication • Signal and status lines tested with a DCDC converter (“needle” backplane used – no soldering on FM-boards necessary) • SSF test • Actel FPGAs with new Firmware are used • Some resistors mounted wrongly (unsoldered according to latest BOM) • 95001F: Short between two status lines on Actel pinout corrected (seen in functional test) Summary of Test Results: TIM Jan07, JSC

  7. UDR2 DAQ Board FM/FS Test • Number of Boards tested: 15 (12 needed as FM) • Testprocedure (before/after Coating and ESS in Dec.06): • - Functional test via AMSWire communication • Data acquisition with FM-Front-Ends • Current monitoring on Test-backplane • SSF test • No problems or errors seen Test-backplane Dec.06 TIM Jan07, JSC

  8. UPSFE FM/FS Test • Number of Boards tested: 9 (6 needed as FM) • Testprocedure (before/after Coating and ESS): • - Functional test via Lecroy communication • Linear Regulator test (28 circuits/board) on a Fusetest-backplane • Signal and status lines tested • Current monitoring • SSF test • Actel replacement after Firmware modification done, but mounted pairwise into wrong position (see Report on replacement procedure) • Some resistors with wrong values exchanged • 95003F: FPGA off-signal failure; Actel problem in off-state, will be exchanged • 95005F: one LR SSF failed after ESS; part failure found, will be exchanged UPSFE board 14x2 LR test circuits Fusetest Backplane Off-signal LEDs Status Jumpers Summary of Test Results: TIM Jan07, JSC

  9. Actel Replacement Procedure 1/2 Vacuum lifter • Solution to misplaced Actel FPGAs proposed and done by CSIST: desolder and swap same ICs to correct position • Thermal stress during desolder process is lower than in reflow soldering process of regular mounting Hot air nozzle Careful inspection necessary! Bottom fan 100°C FPGA pads have experienced 5 unavoidable de-/solder processes now TIM Jan07, JSC

  10. Actel Replacement Procedure 2/2 Manual soldering Iron@650°F + 5sec slide/edge Flux TIM Jan07, JSC

  11. FM UPD Assembly Status • CSIST technicians will follow UPD Assembly document prepared by Mike Schmanau • Production of needed I-Frames for UPD boards was finished with priority in Dec 06 • Cabling and soldering work on UPD boards is waiting for materials and tooling; most needed parts will arrive mid January Assembly discussion at CSIST TIM Jan07, JSC

  12. FM U-Crate Assembly Status • JINF production and testing has to be finished • UHVG production and testing has to be finished; PCA now waiting for new part supply • CSIST accepted to produce three set of flight cables for us - materials will be delivered mid January - U Cabling document is being prepared (lenghts and procedure) - final cable lengths already partly verified on wooden mockup (Andrey) TIM Jan07, JSC

  13. Time Schedule (updated) • Delays: shipment of UPD assembly materials and tools to CSIST; late Chinese New Year holidays in February • Full TRD readout test with FM Electronics will be performed in Aachen TIM Jan07, JSC

  14. Status Summary • Board-level acceptance tests were completed for needed FM boards in December06 (excluding Uhvg and Jinf); two UPSFE boards still need part exchange • Assembly of two FM set of UPD and U-Crate will start as soon as materials arrive at CSIST TIM Jan07, JSC

  15. Backup Slides TIM Jan07, JSC

  16. Actel off-signal Failure • Consequence: two UHVG boards cannot be switched to ON state • Lucky incident: after a replacement also observed on QM2 board with a new Actel Actel0 (on) output: high/low opens/closes transistor UHVG input: Small current (which is OFF state) Actel1(off) output: constant drop 0.6 V TIM Jan07, JSC

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