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Uttam Singisetti

Two-dimensional electrical characterization of ultra shallow source/drain extensions for nanoscale MOSFETs. presented by. Uttam Singisetti. Advisor: Professor Stephen Goodnick Electrical Engineering Department. Science and Engineering of Materials Program. Arizona State University.

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Uttam Singisetti

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  1. Two-dimensional electrical characterization of ultra shallow source/drain extensions for nanoscale MOSFETs presented by Uttam Singisetti Advisor: Professor Stephen Goodnick Electrical Engineering Department Science and Engineering of Materials Program Arizona State University

  2. Outline of the Talk • Background and Motivation for the work • Fabrication of ultra shallow junctions (USJ) • One-dimensional (1-D) Secondary Ion Mass Spectroscopy analysis of USJs • Electron holography (EH) technique and 1-D analysis using EH • 2-D Electron Holography Results of the USJs • Interpretation of results and conclusion

  3. MOSFET Scaling and ITRS Requirements Moore’s Law has been driving force for the continued scaling of transistors http://www.intel.com/research/silicon/mooreslaw.htm

  4. 2003 ITRS Requirements for Ultra Shallow Junctions for source/drain extensions InternationalTechnology Roadmap for Semiconductors (ITRS) identifies the features for future generations

  5. Poly gate Oxide Junction Depth Gate Overlap Source Drain • Major challenges are • Ultra shallow junction depths to reduce short channel effects • Low sheet resistance • High lateral abruptness • 2-D control of the doping profile (Gate Overlap or lateral diffusion)

  6. ASU Nano-CMOS Process Aim: To fabricate sub-50 nm gate length NMOSFET and integrate with Si Single Electron Transistor (SET) • Key Fabrication Steps are • Source/Drain Fabrication by Rapid Thermal Diffusion (RTD) from heavily doped Spin-on-Glass (SOG) • Self-aligned Gate Sidewall Spacers by RPECVD oxide/nitride and Reactive Ion Etching (RIE) • Gate length definition by Electron Beam Lithography • Status • 300 nm and 90 nm n channel MOSFETS fabricated successfully • Failure of 70 nm gate length MOSFET due to Source-Drain overlap

  7. Motivation • Fabricate ultra shallow junctions below 40 nm using Rapid Thermal Diffusion • One-dimensional chemical characterization of the USJs using SIMS • One-dimensional electrical characterization by Electron Holography • Two-dimensional characterization of the USJs and estimation of the lateral diffusion in USJs

  8. Fabrication of Ultra Shallow Junctions Silicon Nitride Al Etch Mask P doped SOG Spin SOG Lithography RTD Heavily B doped Si Nitride Mask • Deposit 200 nm of LPCVD silicon nitride on heavily B doped p-type substrate • Nitride film is patterned by optical lithography and reactive ion etching to open diffusion windows • P doped Spin-on-Glass is spun and baked to drive away solvents • Rapid thermal diffusion carried out in a TAMRAK RTA equipment • SOG removed by etching in HF and 100 nm Cr metal deposited for TEM sample preparation for electron holography.

  9. Vertical Diffusion mask is critical for accurate 2-D profiling of USJs RIE with CF4 gas only Al Etch Mask Oxide Si Substrate

  10. Al Etch Mask Nitride Silicon Substrate RIE with optimized values of power and pressure and CF4 and O2 gas flow

  11. 13 kV Back Scattered Ions -1 kV Cs+ Ion Gun Quadrupole Mass Analyzer Two USJs with nitride mask and one USJ with oxide mask were fabricated following the procedure discussed 1-D chemical analysis was carried out by Secondary Ion Mass Spectroscopy (SIMS) Sputtered Ions (P, B)

  12. MJD SIMS Analysis carried out using 14 keV Cs+ primary ion source in the CAMECA IMS 3F equipment at ASU The Metallurgical Junction Depth (MJD) as determined from SIMS is 30 nm and 60 nm respectively for the two junctions

  13. MJD of 50 nm as determined from for USJ with oxide diffusion mask

  14. Recoil Implantation or “knock-on” effect in SIMS Delta Layer SIMS profile of a delta doped P sample measures in CAMEC IMF 3F The “knock-on” effect seen is quite significant

  15. CAMECA IMS 6F at North Carolina State University has been optimized for minimal “knock-on” effects for P measurement This System uses 3 keV Cs+ primary ion and has post sputter acceleration system The SIMS profile shows a higher surface concentration and drops rapidly, which is typical of P junctions

  16. Electron Holography a Transmission Electron Microscopy Technique Field Emission Gun Reference wave through vacuum Object Wave Digital Hologram USJ Sample Electrostatic Biprism CCD camera Hologram Lorentz lens Philips CM200 FEG TEM, ASU

  17. Digital Hologram Reconstruction Inverse Fourier Transform Digital Hologram Complex Image Fourier Transform Thickness Image Phase Image

  18. Bright region indicates presence of a junction Vacuum n+ Nitride 1-D Scan p 100 nm Cr from Sample Preparation Phase Images are converted to potential image by Where CEis the interaction constant Which depends on the acceleration voltage of the electrons, V0mean inner potential of Si Reconstructed phase image of 30 nm MJD sample

  19. 1-D Measured and Simulated Potential Profiles The potential profile is simulated from the SIMS profile using a self-consistent Poisson Solver* Conversion of 1D Potential Profiles to 1D Electric Field and Total Charge Distribution Simulation for 100% activation * Ref:http://www.nd.edu/~gsnider

  20. Derived From Electron Holography Electrical Junction Depth (EJD) is the point where the total charge goes to zero. This is the point of inflection on the 1D potential profile The EJD from Electron Holography is ~ 25 nm

  21. EJD ~ 27 nm Simulated from SIMS data Simulation of the Electric Field and Total Charge concentration from the SIMS profile using a Poisson Solver

  22. Nitride 1D Scan 200 nm Similar 1-D analysis was carried out for the 65 nm USJ and USJ with oxide mask

  23. EJD 1-D Potential profile for the 65 nm USJ from the from EH and Simulation of SIMS profile 1-D Electric field and total charge from EH and Simulation gave an EJD value of ~60 nm

  24. Cr from TEM Sample Preparation Vacuum n+ p ~ 30 nm ~ 5nm Nitride Mask Si 100 nm Two-Dimensional Analysis of the USJs The dark contour line is the halfway point of the total variation of the potential in the Space charge region Rescaled 2-D Potential Image from EH

  25. 2-D Potential Image from EH for the 65 nm MJD Sample 2-D charge image (arbitrary units) 2-D Poisson Equation Nitride mask Nitride Vacuum ~ 5nm Si ~ 65 nm 200 nm ~ 65 nm Si 200 nm n+ p

  26. n+ Oxide ~ 50 nm p 100 nm 2-D Analysis of the USJ with oxide diffusion mask

  27. The lateral diffusion USJs with nitride mask is retarded compared to the lateral diffusion in USJs with oxide mask • The stress induced in Si substrate due to nitride film could be the factor for observed lateral diffusion • The diffusion constant (D) and equilibrium concentration of interstitials are dependent on stress in Si substrate

  28. Nitride Si Stress Simulation near the nitride mask edge in ATHENA Process Simulator Presence of high stress near the edge This can be correlated to the observed diffusion profile in EH

  29. Oxide Si Stress simulation for Si substrate under oxide mask shows an order of magnitude less stress than with a nitride mask

  30. Cr from TEM Sample Preparation Vacuum n+ p Oxide Nitride Mask Nitride Si n+ 100 nm Oxide ~ 50 nm Si Si p 100 nm

  31. There is a supersaturation of vacancies and undersaturation of interstitials in the Si substrate underneath nitride film, this is due to the dynamic state of the nitride film • The LPCVD nitride is under high stress, it can relieve stress by generating Frenkel Pairs at the Si/Si3N4 interface. The Si interstitials go into the film and relieve the stress. The vacancies are injected into the substrate which cause an undersaturation of interstitials via recombination reaction • This could suppress the diffusion of phosphorus under the nitride film as phosphorus predominantly diffuses via an interstitial mechanism • The observed anisotropy could be due to any of the above discussed factors or a combination of these factors

  32. Conclusion and Future Work • Two-dimensional electrical junction depth (EJD) delineation was carried out on ultra shallow junctions • Reduced lateral diffusion was observed for junctions with a nitride mask than with an oxide mask • Stress in the Si substrate under nitride mask was simulated as a possible factor for the observed phenomenon • Diffusion mask dependent lateral diffusion can be used to engineer source/drain extensions in nano-scale MOSFETS via “Defect Engineering” • Complimentary measurements using Scanning Spreading Resistance Microscopy can substantiate the observed anisotropy in diffusion

  33. Al Oxide Silicon Questions or Comments ?

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