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SNS Control Group at BNL

SNS Control Group at BNL. DOE Review May 7-9, 2002 Ring, HEBT & RTBT Controls. Contents. Integration Power Supply **** Timing ** Vacuum * RF * Diagnostics IPM BLM*** BIG & Tune Collimator & Beam Dumps * DAQ PC Devices (BCM, BPM, Video Foil, Laser Wire) Applications .

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SNS Control Group at BNL

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  1. SNS Control Group at BNL DOE Review May 7-9, 2002 Ring, HEBT & RTBT Controls

  2. Contents Integration Power Supply **** Timing ** Vacuum * RF * Diagnostics IPM BLM*** BIG & Tune Collimator & Beam Dumps * DAQ PC Devices (BCM, BPM, Video Foil, Laser Wire) Applications

  3. Integration Started Conversing Sun to Linux Installed a Linux Server ORNL ported ORNL Linux configuration to BNL Moved Power Supply Development to Linux Started Conversion to EDM (From MEDM) Timing Distribution System Installed in Lab Database Meeting With ORNL Summarize all the BNL Local Database Requirements Driven by Power Supply Application

  4. Power Supplies Preliminary Design Review Held in January 2002 PSC Driver Software Demonstrated IOC Power Supply Prototype Demonstrated Operator Screens Demonstrated Final ICD Complete Database Driven Application Automatic Generation of Screen Displays

  5. Power Supplies Vendor (Apogee) Delivered all PSC & PSI Hardware Some Went to ORNL, LANL, Power Supply Vendors IOC, Driver and Application Software Submitted to ORNL CVS Available to Partner Labs For Testing PSC/PSI Interface tested with Real Supplies (Vendors & Lab) Waveform & FFT Displays Shown Next Slides

  6. The PSI SystemThe Test Configuration Labview Test Software and PSC Hardware Delivered to PS vendors.

  7. Power Supply Testing Danfysk Supply at BNL with PSI Interface

  8. PSI Embedded in Power Supply

  9. Power Supply Testing – Portable Epics System Single Fiber Pair connects VME to PS

  10. Portable Epics Power Supply Tester PSI and VME with CPU and PSC PSI PSC CPU Full Capability – Uncluttered, Simple

  11. EPICS Power Supply Screen Update Rate Fast Compared to Serial Port Interface

  12. Power Supply Detail Screen

  13. Power Supply Test – 100Hz Data Source of Noise Not Obvious From Graph

  14. 10K HZ Data From Power Supply 60Hz and higher frequency noise obvious at 10KHz sampling rate.

  15. FFT Display of PS Data Raw Data Display Noise at 60,120,720, 1440, 2160+ Hz Using 10% of data FFT Display

  16. PSC Memory DataSpreadsheet Display From File Optionally Save Data to Disk and Import into Excel

  17. Long Term Reliability Testing Each VME Has 4 PSC’s Each Rack Has 24 PSI’s Running at up to 4000Hz for several months One for Testing Software Triggers, One for Testing Hardware Triggers

  18. Reliability Testing Two Racks, 1 VME / Rack, 24 PSI/VME – 48 PSIs Trigger Rates 3000 Cycles/Sec – 86,400Cycles/day 4 Messages/Cycle – Tests Run 40 Days Total Message 3000 * 48PSIs * 86,400 * 40 days * 4 msgs 2 * 10^12 Messages Without Error –April 2002 Check for CRC Error, Status Bit Error, Time Out ADC Reading Out Of Tolerance

  19. Power Supply Software Power Supply Application Automatically Generates IOCs and MEDM Screens from a Database Database Requirements Given to ORNL After the first Application – Subsequent Applications are Easy All PS IOC’s the Same Except for Number of Supplies? Try to Keep Applications Similar Power Supply Status Bits Time Will Tell

  20. IOC PSI Power Supply PSC Cables Fibers VME 1 MHz ADC Enet 1 MHz Function Generator Kickers Use PSC/PSI for Control/Status IOC PSI Power Supply PSC Cables Fibers VME • PSI controls each charging power supply • Waveshape determined by PFN. 300 MHz ADC Extraction Kicker Enet Trigger • PSI provides digital control and status monitoring • Waveshape determined by function generator. Injection Kicker

  21. Power Supplies Continued Extraction Kickers – Fast Waveform Measurement (300MHz) EPICS Ethernet Scope interface IOC Written (0.5u sec pulse) Demonstrated Operator Display Program (Preliminary) Timed Accurate Read of Charging Voltage Prior to Trigger Possible Scope Only Provides 8-bit Accuracy Uses Standard Hardware/Software for On/Off Control, Status Readbacks – Read ADCs Just Prior to Extraction Injection Kickers – Need Ramp control and Readback (1 millisec) Yokogawa Hardware for Function Gen. and Digitizer Ordered Driver Software Started Uses Standard Hardware/Software for On/OFF Control, Status Readbacks

  22. Four Channel Scope Display Demonstrates Fast Updates IOC with Ethernet Scope driver Operator Display Program Needed Plan to use Java Combine arbitrary scope traces on one display

  23. PS and DAQ – 4 Channel Scope Display

  24. PS - Work to be Done - Integration SNS Utility Module Received From LANL (With Epics Drivers) Provides RTDL Data, Event Alarms, Temperature and Crate voltage measurements Timing Slave Module Received - Prototype Board Driver Completed Integrate with Power Supply Application IN PROCESS - Adding Utility and Timing Board Needs Working RTDL and Event Link + Time Stamp Procedure MPS Error Event + Vxstat + Power Supply Application Is a Prototype for Other IOCs Timing Module + Utility Module Time Stamping + CVS + EDM + New EPICS + DM

  25. Power Supply New Proposal Optionally set Magnet Field in Addition to Current Cycle Power Supply on Startup and on Demand Optionally Set Current/Field in one Direction Don’t allow Power Supply to Overshoot Requested Value (Do a automatic cycle on each Up Command?) Significant Change to Prototype Application

  26. ADC Reading Accuracy

  27. ADC Reading With Averaging - <+-1bit IOC Software can Average data Over N Pulses

  28. DAC Performance TestingDAC Temperature and Long Term Stability 300uvolts = 1 bit Example = 1/3 bit

  29. ADC Reading as Function of Temperature 300uvolts = 1 bit Approximately ½ bit change with 10 degree F change in temp.

  30. ADC Linearity Test Approximately 1-bit (300uvolts) variation from –10v to +10v input.

  31. Timing

  32. Global Timing – EventLink Hardware SNS Eventlink Master (V123S) - Six prototype eventlink encoders have been built and delivered to member labs. (V101) - Twelve eventlink input modules have been built and delivered to member labs (complete) (Custom Backplanes) - Two production and six prototype backplanes have been built and delivered to member labs (complete) Eventlink slaves (V124s) (V124S) – Ten (10) Preproduction modules built. An order for 50 production modules is out for bid

  33. Global Timing – RTDL Hardware RTDL V105) - Encoder Modules Six (6) Production Modules were Built and Delivered to Partner Labs – With CRC Check. (V106) – Twelve (12) prototype input modules were built and delivered to member labs (two per prototype system) (V206) - An 8 channel RTDL input module is being developed for BNL. The prototype is undergoing testing. It will be used by SNS. (Some old 2 channel cards are on loan.) (Backplanes) - Five (5) Production Custom Backplanes Fabricated – Four Shipped to ORNL

  34. Timing System Hardware (Fanout) - 16 channel eventlink fanout. A prototype was build and undergoing testing. (GPS Receiver) - A GPS receiver was received and set up in the timing lab for software development. The RTDL Master IOC will propagate Time-Of-Day to all IOCs via the RTDL Link. To Be Tested. (Documentation) The Timing Systems Requirements Document (SRD) was updated with latest revisions. The Timing system block diagram was revised.

  35. Timing – Software Design Review Design Review Held January 2002 at BNL RTDL Master Driver Written and Sent to Partner Labs Event Link Master Driver Written and Sent to Partner Labs Event Link Slave Driver Written and Is In Test Drivers for the Input Boards Written Timing System RTDL and Event Link Application Written To Generate Events – Test Event Link RTDL – Transmit Data Checkout System Integration and Checkout is Occurring at All Labs

  36. Event Master IOC – Test Application

  37. Event Timing System Lab Setup

  38. RTDL Timing System Lab Setup

  39. Vacuum Controls – Lab Setup Vacuum Lab is being updated with new equipment

  40. Vacuum Controls ION Pump and Gauge Controller Vendor Selected Controllers Use RS485 Interface Controllers Recently Became Available for Testing. A RS485 Interface Board was Purchased A RS485 Driver is being Written J Tang – Principal Programmer for Vacuum going to ORNL X Geng – Will take over the Vacuum work at BNL

  41. High Level RF This is a PLC Interfaced System. Simple Software Interface Preliminary ICD Complete Hardware (Rack, IOC, PLC) on order. Many Read-Only Parameters Very Few Settable Parameters Prototype RSView Operator Screens will be Provided by the RF Group Controls will Duplicate with EDM Scheduled for 04?

  42. Low Level RF Preliminary ICD in progress. Several BNL designed Boards will be built. Each needs an EPICS Driver Development IOC installed Interfacing MVME2100 CPU to PMC DSP Board RF group will Program DSP Board 4 VME Systems – 3 Types Many Timing Channels – Estimated 13 Boards

  43. Diagnostics IPM System will be Similar to RHIC System Uses Fast ADC – 10MHz at 14bit ADC For Testing Acquired ADC Testing to Start Soon No ICD – RHIC Technote Available ICD in Progress Hardware Description Needed

  44. BLM Requirements 1 - Determine Radiation Level on Each Pulse Use 16-bit ADC @ 100KHz 2 - Detect Low Radiation, (1 watt/Meter) Use 24 bit ADC @ 100KHz Goal – Detect 1 watt/Meter at 1% accuracy in < 90 seconds

  45. BLM – Low Level Sampling Procedure Measure Baseline Data for 1 millsec before the pulse Measure Pulse data for 2 or 3 millisec. Sampling Rate is 100KHz Integrate, Subtracting Baseline

  46. Beam Loss Monitors Measure Radiation Level on Each Pulse 16-Bit 100kHz ADC Acquired. (100 Samples / Millisec) Integrate Data BaseLine Correction Probably Not Needed Baseline Drift 6uv/degC – ADC Resolution 300uvolts Hardware Tested, Report Written – ADC Satisfactory Will Not Be Used to Detect Low Levels of Radiation.

  47. BLM – Low Level Radiation Read Low Radiation Levels Need to measure very low signals accurately Low Signal to Noise Input Data 24-Bit ADC Board Acquired and Tested ADC Report Delivered Application testing in process Need to Detect 180u volt signal to within 2uvolts Average Many Samples over many seconds. Determine if 1% and 90sec Requirements Can Be Met Use BLM Simulator Built by Diagnostic Group Data to Follow

  48. Simulated BLM Signals Pulse to Pulse Variation Calculate area under Red Curve

  49. 24-Bit ADC Testing - Averaging

  50. Averaging from 1 to 3600 Pulses 600 Pulse Average Chosen – 10Secs.

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