1 / 12

Fiduccia-Mattheyses Algorithm

Fiduccia-Mattheyses Algorithm. Perform FM algorithm on the following circuit: Area constraint = [3,5] Break ties in alphabetical order. Initial Partitioning. Random initial partitioning is given. Gain Computation and Bucket Set Up. First Move. Second Move. Third Move. Forth Move.

trilby
Télécharger la présentation

Fiduccia-Mattheyses Algorithm

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Fiduccia-Mattheyses Algorithm • Perform FM algorithm on the following circuit: • Area constraint = [3,5] • Break ties in alphabetical order. Practical Problems in VLSI Physical Design

  2. Initial Partitioning • Random initial partitioning is given. Practical Problems in VLSI Physical Design

  3. Gain Computation and Bucket Set Up Practical Problems in VLSI Physical Design

  4. First Move Practical Problems in VLSI Physical Design

  5. Second Move Practical Problems in VLSI Physical Design

  6. Third Move Practical Problems in VLSI Physical Design

  7. Forth Move Practical Problems in VLSI Physical Design

  8. Fifth Move Practical Problems in VLSI Physical Design

  9. Sixth Move Practical Problems in VLSI Physical Design

  10. Seventh Move Practical Problems in VLSI Physical Design

  11. Last Move Practical Problems in VLSI Physical Design

  12. Summary • Found three best solutions. • Cutsize reduced from 6 to 3. • Solutions after move 2 and 4 are better balanced. Practical Problems in VLSI Physical Design

More Related