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This update provides a comprehensive overview of the status of the 96 Channel FED Tester project as of July 23, 2003. Key developments include the return of two PCBs from Express Circuits, ongoing assembly at Cemgraft, and the manufacture of mechanical components. The VHDL design is nearing completion, though several tasks such as error diagnostics and simulations are still in progress. Additionally, the project schedule emphasizes the importance of prototype testing in August, with the goal of delivering a complete system by the end of October.
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Current Status (I), 23 July 2003 • Manufacture & Assembly • 2 PCBs back from manufacture at Express Circuits & now being assembled at Cemgraft • Mechanical parts • Brass PCB supports (in manufacture) • Perspex cover for AOH (needs minor modification to drawings). • Front panel (in design). • Brass/Perspex AOH support (in manufacture). • VHDL • Almost complete. Still to do: Error diagnostics, TTC & BC0 check • ModelSim simulation (include both FPGAs, VME master & I2C slaves) • FE: DACs, X-Switch, QPLLs & Master/Slave Control • BE: VME, Temp Control (I2C & PID), AOH (I2C) • Synthesised FE @ 120MHz & BE @ 40MHz. PROM files made. 96 Chann FED Tester Status : Greg Iles
C++ Code (James Leaver) HAL object: Allows you to read/write to registers HAL application: Higher level operations XDAQ application: Needed to talk to FED (Started, but not yet finished) JTAG Almost complete. For JTAG experts: JTN & DIF generated. NIF & GEN almost done Misc Still not received AOHs.... When ? Fibre Viewer: Not clear to me if we need male (~£800) or male/female (~£2000) MPO viewer or neither. Crate being assembled by Costas & Osman. Linux 7.2.1 & XDAQ being installed today. SBS PCI-VME card on order. Current Status (II), 23 July 2003 96 Chann FED Tester Status : Greg Iles
FED Tester PCB Analogue Optical Hybrids (AOHs) BE FPGA VME, Temp Control (I2C & PID) APV Frame generation, DACs, X-Switch, QPLLs Opto-Connectors DACs Clk & Control Power Fibre reels Cross-point switches 96 Chann FED Tester Status : Greg Iles
Faults 1 schematic and 1 layout fault found. Can be rectified on prototype. Schedule Test prototype in August. I have only 13 working days so we may venture into September Manufacture 4 or 5 further boards in September. Manufacture 2 weeks Assembly 2 weeks Have full 96 channel system by the end of October. Mistakes & Schedule 96 Chann FED Tester Status : Greg Iles