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Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare

Fast Tracker. A hardware track finder for the ATLAS trigger. Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare Laboratori Nazionali di Frascati. 11th ICATPP Conference on Astroparticle, Particle, Space Physics, Detectors and Medical Physics Applications.

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Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare

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  1. Fast Tracker A hardware track finder for the ATLAS trigger. Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare Laboratori Nazionali di Frascati 11th ICATPP Conference on Astroparticle, Particle, Space Physics, Detectors and Medical Physics Applications

  2. Outline • The Fast Tracker for ATLAS level 2 • Physics motivations • Fast Tracker internals • Fast Tracker performances • A pixel clustering algorithm for FTK Alberto Annovi

  3. TRIGGER @ HADRON COLLIDERS Pile-up: CDF: ~7 events @3 1032 cm-2 396 ns interbunch LHC: ~25 events @1034 cm-2s-1 25 ns interbunch A few hundreds events at SLHC H B charmless decays RARE EVENTS S1/2 (TeV)‏ Hard Life! 109 107 p p 105 Events/s with L = 1034 cm-2s-1 event + underlying event + pile-up 103 σ 10 B0->K 10-1 10-3 Alberto Annovi

  4. 30 minimum bias events + H->ZZ->4m What does FTK? Find tracks pT>1 or 2 GeV Where is the Higgs? m m m m Tracks with Pt>2 GeV FTK 30 minimum bias events + H->ZZ->4m Where is the Higgs? m m Help! m Alberto Annovi m Tracks with Pt>2 GeV

  5. SVT Builds on the Silicon Vertex Trigger experience Fast Track (FTK) LHC For SVT see G. Punzi plenary talk (Monday) Alberto Annovi

  6. Fast tracking in pixel and SCT det. Total # of readout channels: PIXELS: 80 millions SCT: 6 millions Alberto Annovi

  7. Where could we insert FTK? Very low impact on DAQ Event rate up to 100 kHz Fast Track (Road Finder+GigaFitter) 2nd output high-quality tracks: Pt>1 GeV 1st output Track data ROB No change to LVL2 CALO MUON TRACKER PIPELINE LVL1 ROD FE FE Buffer Memory Buffer Memory Raw data ROBs Fast network connection CPU FARM (LVL2 Algorithms) Alberto Annovi

  8. FTK collaboration & schedule Argonne National Lab : J. Proudfoot and J. Zhang Univ. of Chicago :A. Boveia, E. Brubaker, F. Canelli, M. Dunford, A. Kapliy, Y.K. Kim, C. Melachrinos, M. Shochet, and J. Tuggle Univ. and INFN Ferrara : L. Tripiccione INFN Frascati : A. Annovi, M. Beretta, and P. Laurelli Univ. of Illinois at Urbana-Champaign : H. DeBerg, A. McCarn, M. Neubauer, and S. Wolin Harvard Univ. : M. Franklin, C. Mills, and M. Morii Univ. and INFN of Pisa : E. Bossini, V. Cavasinni, F. Crescioli, M. Dell’Orso, P. Giannetti, M. Piendibene, G. Punzi, F. Sarri, I. Vivarelli, G. Volpi, and L. Sartori Waseda University : N. Kimura and K. Yorita • R&D Proposal to work on TDR: approved Feb 2008 • Preparing the TDR (2009) to be approved 2010 for SLHC Phase I • Expected inst. luminosity: 1034 – 3*1034(and 1035 later on) • staging is being considered to take data with FTK also before the Phase I shutdown:  • it is very important to learn at lower luminosities before going up to SLHC  • early impact on physics : lepton isolation,  b-tagging and tau-tagging studies • (Zbb;  Ztau tau) Alberto Annovi

  9. Physics motivations B-tagging: FTK vs offline Alberto Annovi

  10. Z0 bbbar for b-jet calibration ATL-PHYS-PUB-2006-006 • Measuring the Z0 bbbar for: • b-jet calibration • improve top mass resolution • bbbar resonances (e.g. Higgs) I.Vivarelli et al. (No-pile-up) Alberto Annovi

  11. Higher efficiency for bbH/A 4 b-jets 4-Jet Trigger Rate @2x1033 Careful study of the 4-jet L1 trigger cross sections: w/ FTK (not 90% effic. for true Pt) w/o FTK “w/o FTK”: assumes that level-2 execution time limits level-1 jet rate to a few hundred Hz., e.g. only jet threshold sharpening at level 2 & no b-tagging. Alberto Annovi

  12. Higher efficiency for bbH/A 4 b-jets • At lower mass, the signal is badly sculpted by the non-FTK jet threshold • Larger discovery region with FTK Signal dijet mass distribution at the trigger Alberto Annovi

  13. z e/m isolation @ high luminosity Calorimetric isolation suffers from high event multiplicity! Isolation with tracks has little sensitivity to pile-up events it becomes easy with FTK Lepton identification: primary vertices fast identification  Isolation with tracks of Pt>Threshold and from rightvertex Alberto Annovi

  14. Tracking in 2 steps Roads • Then track fitting inside roads. • Thanks to 1st step it is much easier. • Find low resolution track candidates called “roads”. Solve most of the combinatorial problem. Pattern recognition w/ Associative Memory IEEE Trans. On Nucl. Sci., vol. 53, pp. 2428-2433 (2006) http://www.pi.infn.it/%7Eorso/ftk/IEEECNF2007_2115.pdf Excellent results with linear approximation! Alberto Annovi

  15. The Event Pattern matching The Pattern Bank ... Associative Memory (AM) see L. Sartori talk Tuesday Alberto Annovi

  16. Feeding FTK @ 100kHz event rate Pixel barrel SCT barrel Pixel disks ATLAS Pixels + SCT Divide into f sectors 1/2f AM Allow a small overlap for full efficiency 1/2f AM 6 buses 40MHz/bus (to be increased) 11 Logical Layers: full h coverage • 8 f regions each with • 6 sub-regions (h-f towers) • df~25o, dh~1.7 • bandwidth for up to • 3*10E34 cm-2s-1 Alberto Annovi

  17. Inside Fast-Track Pixels & SCT cluster finding split by layer RODs overlap regions HITS AM brd AM brd Data Formatter (DF) 6x h-f towers Data Organizer Data Organizer 50~100 KHz event rate … Track Fitter Track Fitter S-links Remove duplicate trks ~Offline quality Track parameters Raw data ROBs Track data ROB Alberto Annovi

  18. The pattern bank for pattern matching 90% Pattern bank size strongly depends on superstrip size. It is a compromise between coarser superstrips = fewer patterns but many more fits 88% Single muon efficiency Bank size (M patterns/region) 4M patterns/region use current AMchip 50M patterns/region with future AMchip >100M patterns/region with AMchip + tree search processor (TSP) Alberto Annovi

  19. h,f,pt,z,d of SCT segments FTK #1(as XFT @CDF) Find SCT segments XFT in COT FTK # 2(as SVT @CDF) links pixel hits To SCT segments CDF SVX SS lsb-bit=1 SS lsb-bit=0 Blue is SS+1, Yellow is SS. Same SS # 2 roads found by blue AM 1 road found by yellow AM Comparing the 2 outputs and rejecting the roads not found by both AM banks, cleaner output Different SS definitions on each layer Blue is SS Yellow is SS-1 Studying different architectures: optimize AM useRedundancy for high luminosity • Two smaller FTKs in cascade (a` la CDF): 8 SCT layers fitted first, then 3 pixels layer + SCT fitted segment • Two Half-SS shifted banks used in parallel to improve SS resolution • New algorithm inserted between the AM and the TF: The Tree Search Processor (TSP) - NIM A287 (1990) 436-438 • http://www.pi.infn.it/~paola/Tree_search_algorithm.pdf Showntoday

  20. 1 4 3 2 1 2 3 4 5 6 7 8 Binary search to go down to better SS resolutions FAT ROAD Found by AM (default SS for example or even larger) PARENT PATTERN Depth 0 Depth 1 PATTERN BLOCK Depth 2 THIN ROAD • Advantages: • pattern bank saved in dense RAMs • high degree of parallelism Algorithm: NIM A287 (1990) 436-438 http://www.pi.infn.it/~paola/Tree_search_algorithm.pdf Tree Search Processor: NIM A 287, 431 (1990), http://www.pi.infn.it/~orso/ftk/NIMA287_431.pdf IEEE Toronto, Canada, November 8-14 1998 http://www.pi.infn.it/~paola/TSP_v14.pdf Alberto Annovi

  21. How much workload for the GF? Full simulation: WH events @1034 cm-1 s-1 GF upgrade for SVT: 1 fit/ns with a Xilinx Virtex 5 FPGA (XC5VSX95T) AMchip : 3.8M patterns/region + TSP : 108M patterns/region <fits/event> ~ 200k Barrel only Region 0 http://www.pi.infn.it/%7Eorso/ftk/IEEECNF2007_2115.pdf Doable with a few FPGAs/region Million of fits Alberto Annovi

  22. A hardware architecture able to digest WH  lnubb + 1034 pileup@ 75kHz event rate 1 FTK f-region : 6 h-f towers h-f Tower 0 h-f Tower 5 ~6500 <Roads>/ev → 3600 for RW reduction → 600/ev if divided in 6 engines → 600 * 75 kHz = 45 MHz →1 Road each 22 ns ….….…….. SUPER Bins SUPER Bins ROADS ROADS HITs 12 L DO + TF 12 L HITs DO + TF TRACKS TRACKS 400 k <Fits>/ev. → 66 k <Fits>/ev. in 6 engines → 66 k * 75 kHz → 5 G<fits>/s → 5 fit/ns TRACKS MERGING + HW Tracks to Level 2 1000 hit/ev/layer corrected for overlaps between region → 1000/3=330/ev. Dividing in 6 h-f towers (with 100% contingency for tower overlap) → 330 * 75 kHz = 25 MHz OK even for current AMchip! Alberto Annovi

  23. 8x core crate layout (TSP option) All found tracks • 12 AM boards • Today technology: • 3.8 106 Patterns today Amchip • 100M patterns TSP • For 2014(?) installation: • O(50 106 ) Patterns for 90 nm •  ??Giga patterns future TSP CPU vme Hit Warrior DO+TF hf-5 DO+TF hf-0 DO+TF hf-3 DO+TF hf-4 DO+TF hf-2 DO+TF hf-1 AM10+TSP AM11+TSP AM6+TSP AM4+TSP AM8+TSP AM2+TSP AM0+TSP AM5+TSP AM7+TSP AM3+TSP AM9+TSP AM1+TSP CUSTOM BACKPLANE 1 h-f tower FTK Output tracks FTK INPUT Alberto Annovi

  24. Tracking quality on single muon events • We compare FTK-reconstructed tracks with an offline algorithm (IPAT) • Resolutions are wrt all truth tracks with pt > 1 GeV and |η| < 2.5 • Performances are comparable Alberto Annovi

  25. σFTK = σoffline⊕30μm FTK proposal: no pile-up barrel only – space points November 2008: nopile-up – full h coverage raw hits WH 10**34 pile-up Single muons 0 2 4 6 8 10 12 14 16 PT [GeV] Alberto Annovi

  26. leading PT track RS RI RO iPat Tracks FTK Sim Tracks Jet axis t-jet efficiency rejection Single Prong (1,0) || < 0.8 for jet 1033 Lumi Efficiency vs.  Efficiency vs. pT  end Fakes as a function of jet Pt Fakes as a function of jet  Alberto Annovi

  27. y f x d d d phi SVT: Online beamline fit & correction L. Ristori et al. Raw Nucl.Instrum.Meth.A518:532-536,2004 <d> = Ybeamcosf – Xbeamsinf http://www-cdf.fnal.gov/cdfnotes/cdf7208_bw_online.ps Subtracted Also used to monitor beam profile. Useful information for accelerator people!  end Alberto Annovi

  28. PixelDetector Pixel clustering for the Fast TracKer Detector interface Fast TracKer input stage • Pixel clustering device for the ATLAS FastTracKer processor • 1st application & design motivation http://twiki.cern.ch/twiki/bin/view/Atlas/FastTracker • Main challenge: input rate 160Gibts • 132 S-link fibers from all pixel RODs • Running at 1.2 Gbits (total 160Gbits) • 32bit words at 40MHz, 1 hit/word • Use hits at 40MHz as benchmark • Focus on clustering quality for level-2 • Illustrate a general clustering strategy 50~100 kHz event rate clustering device 132 S-links Level-2 Event buffers FTK reconstructs tracks for level 2 Alberto Annovi

  29. The problem • Clustering is a 2D problem • Associate hits from same cluster • Loop over hit list • Time increases with occoupancy & instantneous luminosty • Non linear execution time • Calculate cluster properties • e.g. center, size, shape … • Goal: execution time linear with number of hits • Not a limiting factor even at highest inst. Luminosity Loopoverlistofhits 6 7 2 3 5 8 9 10 1 4 Alberto Annovi

  30. The algorithm working principle Core logic: Hit associated into clusters FPGA replica of pixel matrix Load all module hits select left most top most hit Loop over clusters in a module propagate selection through cluster Loop over events and pixel modules Eta direction --> Pixel module is a 328x144 matrix. Replicate it in a hardware matrix. The matrix identifies hits in the same cluster (local connections). read out cluster 2nd pipeline stage Average calculator out high level cluster analysis  end Alberto Annovi

  31. Clustering by 328x8 slices? Fill 328x8 slice like this Fill 328x8 slice like this Module data Module data And so on Read out 2nd cluster Read out 1st cluster Eta direction --> Eta direction --> Shift of hits comes for free (no extra time)! Just use the slice as a circular buffer in the eta direction. Then hits are shifted by redefining the first column. SLIDING WINDOW: with one xc5vlx155 process one S-Link Implement 2 processing matrixes. Process hits at 40MHz rate. Alberto Annovi

  32. Two priority logic chains hit Control logic hit sel select hit hit pixel cell sel hit • a 1st priority logic • needed to select first hit • a 2nd priority logic • needed to readout selected hits (cluster) • position from address bus select hit pixel cell select This logic selects the top most pixel. Similar logic to select the left most column with a hit. X 328 pixels in a column and 144 columns Alberto Annovi

  33. The elementary cell Cluster definition: Contiguous hits along side or corner Flexibility to redefine it 3 STATES (2 FLIP-FLOPS): IS_EMPTY IS_HIT IS_SELECTED SEL HIT clk clk Combinatorial logic IS_HIT 1st neighborhood IS_SELECTED 8 SEL FOR READOUT IS_SELECTED WRITE ROW SEL AND 9 COLUMN SEL Rowaddr Bus (output) Alberto Annovi

  34. Conclusions • FTK performs global track reconstruction at Level-1 trigger rate • Using massively parallel Associative Memories, FTK will provide a complete list of 3D tracks at the beginning of Level-2 processing • Time saved by FTK can be used in Level-2 for more advanced algorithms • Bonus: access to tracks outside Regions of Interest • FTK easily integrates with current ATLAS DAQ • Builds on success of Silicon Vertex Trigger (SVT) at CDF • More info: http://www.pi.infn.it/~orso/ftk/ https://twiki.cern.ch/twiki/bin/view/Atlas/FastTracker Alberto Annovi

  35. Thanks for your attention Alberto Annovi

  36. D xi From non-linear to linear constraints Non-linear geometrical constraint for a circle: F(x1 , x2 , x3 , …) = 0 But for sufficiently small displacements: F(x1 , x2 , x3 , …) ~ a0 +a1Dx1 + a2Dx2 + a3Dx3 + … = 0 with constant ai (first order expansion of F) Alberto Annovi

  37. Constraint surface 14 measured coordinates: x1 … x14 5 parameters to fit : f, d0, pT, h, z0 9 constraints Linear approximation is good within any given set of physical modules. Alberto Annovi

  38. Discovery reach (FTK double b-tag  25 Hz L2 output) • Note that FTK is rather insensitive to a much higher background rate due to either higher luminosity or MC  reality. Alberto Annovi

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