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Competitive Solutions

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  1. Competitive Solutions DX0120

  2. Nature of Assignment • Retained by FTC counsel Spring 2002 • Conduct economic analysis of Rambus’s alleged actions • Analyze competitive nature of Rambus’s alleged conduct • Determine competitive effects or potential effects of such conduct • Determine appropriate remedies DX0121

  3. Understanding of FTC Allegations • Subversion of open standard process (JEDEC) through non-disclosure of IP and related misrepresentations • Industry adoption of JEDEC standards embodying claimed Rambus IP • Subsequent enforcement of Rambus IP against JEDEC-compliant DRAM • Rambus’s conduct eliminated alternative technologies that, before the standards were issued, were commercially viable • Harm to competition in / monopolization of DRAM technology markets DX0122

  4. Key Economic Questions • What are the relevant antitrust markets? • Does Rambus possess substantial market / monopoly power in such markets? • Did Rambus acquire market / monopoly power through exclusionary conduct? • Has Rambus’s conduct resulted in anticompetitive harm (actual or threatened)? • What remedy (if any) is needed to restore competition / alleviate the anticompetitive effects of Rambus’s conduct? DX0123

  5. Interviews Conducted • DRAM engineers • DRAM plant managers • JEDEC participants • DRAM users DX0124

  6. Materials Reviewed / Relied Upon • Business records from Rambus and third parties • Minutes and presentation materials from JEDEC meetings • Relevant deposition / trial testimony • Reports of FTC / Rambus experts • Relevant economics literature • Literature on DRAM and semiconductor industries • Publicly available trade press, analyst reports, and company sources DX0125

  7. Case Study • Methodology: Comprehensive review of public / private reports and information • Focus: evolution of DRAM standards / technologies • Time period: 1990 to present • Information sources: publicly available materials, trade press, analyst reports, discovery materials • Purpose: assessing economic factors influencing choices among alternative DRAM technologies / standards DX0126

  8. Summary of Conclusions • What are the relevant antitrust markets? Conclusions: • Four relevant technology markets • Each consists of commercially viable alternatives for addressing specific DRAM design issues • Each market is world-wide in scope • The four markets can be viewed together as a single “cluster market” DX0127

  9. Summary of Conclusions 2. Does Rambus possess substantial market / monopoly power in such markets? Conclusions: • Rambus possesses monopoly power in each of the relevant technology markets • Rambus’s monopoly power stems from the use of its patented technologies in the dominant world-wide DRAM technology standards (i.e., JEDEC’s SDRAM and DDR-SDRAM standards) DX0128

  10. Summary of Conclusions 3. Did Rambus acquire market / monopoly power through exclusionary conduct? Conclusions: • Rambus’s challenged conduct is “exclusionary” in that it • Distorted an open competitive process by concealing (or misrepresenting) material information • Excluded equally efficient or superior alternative technologies • Entailed a conscious choice to jeopardize the enforceability of patented intellectual property • By distorting JEDEC’s standardization process, Rambus’s exclusionary conduct enabled it to obtain monopoly power DX0129

  11. Summary of Conclusions 4. Has Rambus’s conduct resulted in anticompetitive harm (actual or threatened)? Conclusions: • Rambus’s conduct has caused significant anticompetitive harm by • substantially increasing prices (royalties) in the relevant technology markets • creating other actual / threatened distortions to competition in those markets (e.g., harm to innovation) • threatening to increase prices in downstream DRAM product markets • undermining confidence in open standards / standards processes DX0130

  12. Summary of Conclusions 5. What remedy (if any) is needed to restore competition / alleviate the anticompetitive effects of Rambus’s conduct? Conclusions: • Rambus should be prohibited from enforcing against JEDEC-compliant DRAMs any patents filed (or based on filings) prior to June 18, 1996 • This remedy should extend both to US and foreign patents • This remedy will restore competitive pricing in the relevant technology markets and mitigate other anticompetitive effects DX0131

  13. DRAM Industry Overview Technology Providers (e.g., Rambus, Jazio) Manufacturers of DRAM-Related Logic (e.g., Intel, AMD, ATI) DRAM Manufacturers (e.g., Samsung, Micron) Technology DRAM Chipsets, Graphics Cards PC-OEMs, Server OEMs and other firms using DRAM (e.g., Dell, Gateway, HP, Cicso) Consumers Graphics Cards Upgrades DRAM Upgrades DX0132

  14. DRAM Buyers Percentage of DRAM Purchases, By Platform Supercomputer, Mainframe, Midrange (3%) Industrial & Additional Motherboards (3%) Entry-level servers (4%) Other: Printers, Routers, Facsimile... (4%) Workstation (5%) Memory Modules (19%) Personal Computers (62%) Source: Gartner Dataquest, DRAM Supply/Demand Quarterly Statistics: Second Quarter 2000 Outlook, Bates No. HR905_06733 (August 14, 2000). DX0133

  15. Basic Economics of DRAM Industry • Large capital requirements • Economies of scale • Interoperability • Price sensitivity • Commodity nature of DRAM DX0134

  16. High Cost of DRAM Fabrication Plants DX0135

  17. DRAM Chip Manufacturers Today DX0136

  18. DRAM Chip Manufacturers in the Past DX0137

  19. Economics of DRAM Production • High fixed costs • Volatility / cyclicality • Intense price competition • Maximize capacity utilization / yield • Intense cost cutting DX0138

  20. Reducing DRAM Production Costs / Increasing Yields • 24/7 operation • Clean rooms • Extended equipment life • Optimized production process • Die shrinks • Larger wafer size DX0139

  21. Economics of DRAM Demand • Multiple sourcing • Long lead times • Backwards compatibility • Minimizing cost per bit • Minimizing design, testing, and qualification costs DX0140

  22. Evolution of DRAM Standards Source: Cahners In-Stat “DRAM Memory Primer 2000” March 2000, Page 57 and In-Stat MDR “DRAM Market Forecast – Is there life After PCs” July 2002, Page 75 DX0141

  23. Importance of Standards in DRAM Industry • Interoperability • Diversity of use • Common product design – DRAM producers • Compatible design – DRAM users • Facilitates price competition DX0142

  24. Nature of DRAM Standards • Basic design specifications / protocols • Focus on interface • Parametrics • Module standards DX0143

  25. How DRAM Standards Are Set • Standard-setting organizations • Private consortia • Proprietary standards DX0144

  26. Economic Factors Influencing Success of DRAM Standards • Open, consensus-based process • Open availability of standard • Royalties • Implementation costs • Manufacturing costs • Evolutionary / revolutionary DX0145

  27. Economic Underpinnings of Evolutionary / Revolutionary • Reuse of existing knowledge / infrastructure • Increasing marginal cost of changes • Debugging / testing • System-level design • Risk DX0146

  28. JEDEC’s Process • Diverse views / preferences • Choice among alternatives • Need for consensus • Time to market • Cost / performance considerations • IP considerations • “Satisficing” DX0147

  29. Problem of Hold-Up “The hold-up problem arises because investments that are specific to another party are vulnerable in renegotiation – the other party can extract some or all of the value of the investments. The value of specific assets – those specific to a relationship with another party – are vulnerable to expropriation by that other party, because the assets have low or no value without the other party’s participation.” P. McAfee. Competitive Solutions: The Strategist’s Toolkit (Princeton University Press, 2002, p. 365) DX0148

  30. Example of Specific Investment ExAnte: Multiple Commercially Viable Fuel Sources Power Plant Design • Potential Fuel Sources • Coal • Natural Gas • Nuclear • Solar • Hydro DX0149

  31. Example of Specific Investment ExPost: One Fuel Source Power Plant Design • Potential Fuel Sources • Coal • Natural Gas • Nuclear • Solar • Hydro DX0150

  32. Example of Specific Investment Mine 5 Mine 1 Mine 2 Mine 4 Mine 3 DX0151

  33. Example of Specific Investment Mine 5 $17/ton Mine 1 Mine 2 $10/ton $12/ton Mine 4 $20/ton Mine 3 $15/ton DX0152

  34. Example of Lock-In Power Plant Locates Near Mine 1 Mine 1 $10/ton DX0153

  35. Example of Hold-Up Power Plant Signs Coal Contract After Building Mine 1 $10/ton $20/ton DX0154

  36. Avoiding Hold-Up Power Plant Signs Coal Contract Before Building Mine 1 $10/ton DX0155

  37. Economic Literature on Hold-Up • Sanford Grossman and Oliver Hart, “The Costs and Benefits of Ownership: A Theory of Vertical and Lateral Integration,” Journal of Political Economy (1986) • Oliver Williamson, Markets and Hierarchy (Free Press, 1975) • Benjamin Klein, “Hold-Up Problem,” The New Palgrave Dictionary of Economics and the Law (Stockton Press, 1998) DX0156

  38. Application of Hold-Up to Standard Setting • Risk of hold-up depends upon characteristics of underlying industry / standards organization • Size of specific investments • Cost of changing standards • Importance of IP • Ease of reaching agreement DX0157

  39. Application of Hold-Up to Standard Setting • Mechanisms for mitigating risk of hold-up ex ante • IP disclosure commitments • IP licensing commitments (e.g., RAND) • IP searches DX0158

  40. JEDEC: IP Disclosure • Preference to avoid patents • Early disclosure / good faith • Disclosure applies to patents / patent applications relevant to JEDEC standards / work • RAND: mandatory for JEDEC; voluntary for members • Valid technical justification DX0159

  41. Application of Hold-Up to DRAM Standard Setting • Size of specific investments • Substantial • Cost of changing standards • Switching costs • Importance of IP • High • Ease of reaching agreement • Difficult and time consuming DX0160

  42. Standard Setting Process A B Standard Setting Process C A - C = Design / Technology Options DX0161

  43. Standard Setting Process A Feature 1 B C D Standard Setting Process Feature 2 B, F, G E F G Feature 3 H I DX0162

  44. Value of C $ D E F Standardization Confers Value A B Standard Setting Process C DX0163

  45. Industry Commitment to DRAM Standard ExAnte ExPost manufacturing interoperability $ $ StandardSetting Process $ plant design compatibility time DX0164

  46. Ex Ante Disclosure of IP ExAnte ExPost $ $ StandardSetting Process $ time DX0165

  47. A C C A Ex Ante IP Disclosure Can Alter the Standard-Setting Outcome With Patent Disclosure Absent Patent Disclosure DX0166

  48. Optimal Choice Made with Full Information Early in the Process A B Standard Setting Process C Ex Ante Disclosure of IP Rights DX0167

  49. C A A C Early Disclosure Leaves “Work-Around” Option Open A B Standard Setting Process C DX0168

  50. Ex Post Disclosure of IP ExAnte ExPost $ $ StandardSetting Process $ time DX0169