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Digital Video Transfer Results (WP2)

Digital Video Transfer Results (WP2). Video Switch Unit. Video Switch Subunit. VIDEO HUB. Video HUB Video Subsystem. Supported Display modes. Changes in D1f: Video Switch Unit and Video Hub Technical Document v.0.5. USB voltage lines to the connector updated

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Digital Video Transfer Results (WP2)

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  1. Digital Video Transfer Results (WP2) 15 Jun 2006

  2. Video Switch Unit 15 Jun 2006

  3. Video Switch Subunit 15 Jun 2006

  4. VIDEO HUB 15 Jun 2006

  5. Video HUB Video Subsystem 15 Jun 2006

  6. Supported Display modes 15 Jun 2006

  7. Changes in D1f: Video Switch Unit and Video Hub Technical Document v.0.5 • USB voltage lines to the connector updated • Commands to the table unit updated 15 Jun 2006

  8. Video Switch Unit schematics, D2a • Page 1: Block Diagram • Page 2: FPGA • Page 3: Bus_A_Rcv, Page4: Bus_A_Tr • Page 5: DVI_From_PC, Page6: To_Monitor • Page 7: Control (microcontroller) • Page 8: Bus_B_Rcv, Page 9: Bus_B_Tr • Page 10: Power + To_Table_Unit 15 Jun 2006

  9. Video Switch Unit PCB, D2b • Video Switch Unit Proto1 PCB 15 Jun 2006

  10. Video Hub schematics, D2a • Page 1: Block Diagram • Page 2: FPGA • Page 3: Bus_A_Rcv, Page4: Bus_A_Tr • Page 5: Bus_C_Rcv, Page6: Bus_C_Tr • Page 7: Control (microcontroller) • Page 8: Bus_B_Rcv, Page 9: Bus_B_Tr • Page 10: Power + To_Table_Unit 15 Jun 2006

  11. Video Hub PCB, D2b • Video Hub Proto1 PCB 15 Jun 2006

  12. Video Switch Unit FPGA, D2c • VHDL code written and simulated • place & route made • meets time constraints • same FPGA design for both Video Switch Unit and Video Hub 15 Jun 2006

  13. Video Switch Unit SW, D2d Video Switch Unit’s MCU code • C code and Powerpoint slides in the project web page 15 Jun 2006

  14. Documents • Code based on: • D1f: ”D1f_VideoSwitchUnit_Technical_document_v_0_4.doc” • D1g: ”ProposedInstructionsetV11.doc” • 3rd Project Meeting Minutes, Braunschweig: ”Third project meeting agenda.doc” 15 Jun 2006

  15. µController • Atmel AVR ATmegaAVR162: • 16 kB Flash • 512 B EEPROM • 1 kB RAM • 35 IO pins • 2 x USART • 2 x 16-bit Timers/Counters OR 4 x 8-bit Timers/Counters • 3.3V (reduced operating frequency below 4.5V) • TQFP32 for production/DIP40 for prototype 15 Jun 2006

  16. Toolchain used • C compiler: CodeVisionAVR 1.24.8 Standard Version • Debugger: AVR Studio 4.12 Service Pack 2 • Emulator: JTAGICE mkII • Programmer: AVR ISP mkII • Editor: Emacs 21.3.1 15 Jun 2006

  17. Main tasks of AVR • receive commands from UI/Master and decode: • reprogram FPGA (Crosspoint Switch for DVI streams) • control DVI chips • redirect USB related commands to ARM board • handshake with Table Unit (at the moment not yet defined) 15 Jun 2006

  18. Code Development statusMay 8, 2006 • Switch Unit and Table Unit handshaking (RS-232) not done (waits for spec. approval) • STUALIVE response not done (waits for spec. approval) • Video Command decoding might need minor adjusting for special cases (Beamer, Teacher, etc.) • Audio and Voting not done (branch structure is in place) • Unit programming should disregard a requirement to send Master signal every 200ms 15 Jun 2006

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