1 / 15

Digital Signal Processing and Field Programmable Gate Arrays

Digital Signal Processing and Field Programmable Gate Arrays. By: Peter Holko. What are FPGAs. Field Programmable Gate Arrays (FPGAs) are programmable semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. Background.

arva
Télécharger la présentation

Digital Signal Processing and Field Programmable Gate Arrays

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Digital Signal Processing and Field Programmable Gate Arrays By: Peter Holko

  2. What are FPGAs • Field Programmable Gate Arrays (FPGAs) are programmable semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects.

  3. Background • First FPGA was released in 1985 by Xilinx with a mere 1,000 logic gates primarily used for interconnections, buses and other peripherals, by 2006 it had increased by over 10,000 times. • FPGAs allow for highly parallel processing through inherent hardware nature. • Xilinx and Altera are the two leaders in FPGA and hold over 90% of the market. • Markets for intensive DSP applications include: wireless communications, video/image processing, and aerospace/defense industry.

  4. Co-processing with a FPGA FPGA co-processors are an extremely cost-effective means of off-loading computationally intensive algorithms from a DSP processor. FPGA Coprocessor for WiMAX Baseband Processing FPGA Coprocessor for High-Definition H.264 Encoding

  5. DSP and FPGA FPGAs Parallel Approach to DSP Enables Higher Computational Throughput Consider a 256-tap FIR filter: Conventional DSP Processor – Serial Implementation FPGA – Fully parallel implementation

  6. Flexibility of FPGAs Different ways of implementing four multiply-accumulate (MAC) functions.

  7. FFT Co-Processing Example • FFT co-processor implemented within an Altera Stratix FPGA and connected to a Texas Instruments DSP via the 32-bit external memory interface (EMIF) • Develop co-processor from intellectual property (IP) such as FFT MegaCore FFT implementation with only the TI DSP processor TI DPS running at 720 MHz completed the 1024-point 16-bit FFT in 9.06 μs FPGA Co-processor implementation At 278 MHz completed the transform in only 4.64 μs FFT Co-processor on Stratic FPGA

  8. DSP Development For the DSP-only approach, functions like FIR filters, FFTs and Correlators are available as pre-built, assembly optimized, C-callable library functions. Challenges arise while trying to optimize the performance of a function for a particular DSP requiring an in-depth knowledge of the processor architecture. However, DSP designers in general are more comfortable with the DSP-only approach due to ease of implementation.

  9. FPGA Development FPGA co-processor approach requires hardware knowledge to assemble the various components of the FPGA co-processing system (EMIF/FIFO interface, transmit and receive FIFO buffers, and co-processing function). The availability of architecturally optimized pre-built IP functions from FPGA vendors like Altera & Xilinx aid in the implementation of co-processors Hardware Description Language PROCESS (clk) BEGIN IF (clk'event and clk = '1') THEN a_reg <= (a); b_reg <= (b); pdt_reg <= a_reg * b_reg; adder_out <= adder_out + pdt_reg; END IF; END process; accum_out <= (adder_out);

  10. Performance of FPGA versus DSP BDTI’s benchmark is based on a simplified OFDM (Orthogonal Frequency Division Multiplexing) receiver DSP processor implementation

  11. FPGA Implementation of BDTI Benchmark Exploits three-levels of parallelism: • Within each receiver block, multiple operations are executed concurrently • All receiver blocks operate concurrently • Multiple receiver modules are used on the same chip FPGA implementation on Xilinx Virtex-4 of a single receiver module

  12. BDTI Benchmarks

  13. Performance Evolution of FPGA versus DSP Processors

  14. Conclusions • FPGAs can out perform DSP processors on certain DSP tasks; computation intensive, highly parallelizable tasks • DSP processors have the advantage for development infrastructure, time-to-market, developer familiarity • DSP processors are still easier to use • Many engineers possess DSP processor development skills • Ultimate speed is not always the first priority • Combination of FPGA and DSP processor is an excellent solution if performance requirements cannot be met by the processor alone • The “Best” architecture depends on the requirements of the applications

  15. References • The benefits of FPGA coprocessing • http://www.dsp-fpga.com/pdfs/Xilinx.RG06.pdf • Implementing FFT in an FPGA Co-Processor • http://www.altera.com/literature/cp/gspx/fft-in-fpga.pdf • FPGAs rapidly replacing high-performance DSP capability • http://www.dsp-fpga.com/articles/ekas/ • DSP Co-Processing in FPGAs: • Embedding High-Performance Low-Cost DSP Functions • http://www.xilinx.com/bvdocs/whitepapers/wp212.pdf • Comparing FPGAs and DSPs for High-Performance DSP Applications • http://www.bdti.com/articles/20061101_gspx06_fpgas.pdf • FPGAs as Coprocessors for DSP Applications • http://www.altera.com/technology/dsp/devices/fpga/dsp-fpga_coprocessor.html • Increase Bandwidth in Medical & Industrial Applications With FPGA Co-Processors • http://www.altera.com/literature/wp/wp_use_of_pld_as_cp5.pdf

More Related